diff options
author | Caio Marcelo de Oliveira Filho <[email protected]> | 2020-05-21 02:26:21 -0700 |
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committer | Caio Marcelo de Oliveira Filho <[email protected]> | 2020-05-27 18:16:31 -0700 |
commit | cb26d9c3119e089a0e0c6b0bf6cfc90193c70326 (patch) | |
tree | f4c4328194c586abf3c87fc55c1385ff7095d95d /src/intel/compiler | |
parent | 5b5e77caa7f0225aab3701de66b7434553c66033 (diff) |
intel/fs: Add helper to get prog_offset and simd_size
This indirection will be used by the variable group size case in a
later change.
Reviewed-by: Jason Ekstrand <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
Diffstat (limited to 'src/intel/compiler')
-rw-r--r-- | src/intel/compiler/brw_compiler.h | 14 | ||||
-rw-r--r-- | src/intel/compiler/brw_fs.cpp | 8 |
2 files changed, 22 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index 43a7c9918ea..cc24e394208 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -942,6 +942,15 @@ struct brw_cs_prog_data { } binding_table; }; +static inline uint32_t +brw_cs_prog_data_prog_offset(const struct brw_cs_prog_data *prog_data, + unsigned dispatch_width) +{ + /* For now, we generate code for one program, so offset is always 0. */ + assert(dispatch_width == prog_data->simd_size); + return 0; +} + /** * Enum representing the i965-specific vertex results that don't correspond * exactly to any element of gl_varying_slot. The values of this enum are @@ -1500,6 +1509,11 @@ unsigned brw_cs_push_const_total_size(const struct brw_cs_prog_data *cs_prog_data, unsigned threads); +unsigned +brw_cs_simd_size_for_group_size(const struct gen_device_info *devinfo, + const struct brw_cs_prog_data *cs_prog_data, + unsigned group_size); + /** * Return true if the given shader stage is dispatched contiguously by the * relevant fixed function starting from channel 0 of the SIMD thread, which diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 83ecef8fa37..74d9818c495 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -9192,6 +9192,14 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data, return ret; } +unsigned +brw_cs_simd_size_for_group_size(const struct gen_device_info *devinfo, + const struct brw_cs_prog_data *cs_prog_data, + unsigned group_size) +{ + return cs_prog_data->simd_size; +} + /** * Test the dispatch mask packing assumptions of * brw_stage_has_packed_dispatch(). Call this from e.g. the top of |