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author | Sagar Ghuge <[email protected]> | 2019-09-27 16:23:46 -0700 |
---|---|---|
committer | Sagar Ghuge <[email protected]> | 2019-10-21 11:27:29 -0700 |
commit | 7ecfbd4f6d407460ae47c598f07627b2b8468811 (patch) | |
tree | 5620e955377763e0cd5fcfa54ffa51b58c4ca3cf /src/intel/compiler/meson.build | |
parent | 0e4bd261b1535b5c1d38607545a54101cb1f3d01 (diff) |
nir: Add alpha_to_coverage lowering pass
Importing this pass from fs_visitor::emit_alpha_to_coverage_workaround()
in intel/compiler.
v2 (Caio Marcelo de Oliveira Filho):
- Track store output and sample mask instruction
- Nest math insturction for more readability
- Bail out early if no gl_SampleMask
v3: (Caio Marcelo de Oliveira Filho):
- Do math instructions after instruction block
- Restructure code
- Move pass under src/intel/compiler
v4: (Caio Marcelo de Oliveira Filho):
- Organize dither mask calculation
Signed-off-by: Sagar Ghuge <[email protected]>
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Diffstat (limited to 'src/intel/compiler/meson.build')
-rw-r--r-- | src/intel/compiler/meson.build | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build index 2d938bc48b2..3b144561372 100644 --- a/src/intel/compiler/meson.build +++ b/src/intel/compiler/meson.build @@ -78,6 +78,7 @@ libintel_compiler_files = files( 'brw_nir_attribute_workarounds.c', 'brw_nir_lower_conversions.c', 'brw_nir_lower_cs_intrinsics.c', + 'brw_nir_lower_alpha_to_coverage.c', 'brw_nir_lower_image_load_store.c', 'brw_nir_lower_mem_access_bit_sizes.c', 'brw_nir_opt_peephole_ffma.c', |