diff options
author | Kenneth Graunke <[email protected]> | 2017-11-03 14:52:05 -0700 |
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committer | Kenneth Graunke <[email protected]> | 2017-11-15 09:37:32 -0800 |
commit | ff964916dc5424495a3e884e02c3b2c8f285b78b (patch) | |
tree | 4dd36238871ef6891324e6dfaa3914c3cda056fe /src/intel/compiler/brw_vec4_nir.cpp | |
parent | f48f52b0306e37d4d41dbf6a32970ee468298b2b (diff) |
i965: Use nir_lower_atomics_to_ssbos and delete ABO compiler code.
We use the same hardware mechanism for both atomic counters and SSBO
atomics, so there's really no benefit to maintaining separate code to
handle each case. Instead, we can just use Rob's shiny new NIR pass to
convert atomic_uints to SSBOs, and delete piles of code.
The ssbo_start section of the binding table becomes a combined ABO and
SSBO section, with ABOs first, then SSBOs.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_vec4_nir.cpp')
-rw-r--r-- | src/intel/compiler/brw_vec4_nir.cpp | 46 |
1 files changed, 0 insertions, 46 deletions
diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp index 0a1caa9fad8..c4ea24b8db7 100644 --- a/src/intel/compiler/brw_vec4_nir.cpp +++ b/src/intel/compiler/brw_vec4_nir.cpp @@ -804,52 +804,6 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) break; } - case nir_intrinsic_atomic_counter_inc: - case nir_intrinsic_atomic_counter_dec: - case nir_intrinsic_atomic_counter_read: - case nir_intrinsic_atomic_counter_add: - case nir_intrinsic_atomic_counter_min: - case nir_intrinsic_atomic_counter_max: - case nir_intrinsic_atomic_counter_and: - case nir_intrinsic_atomic_counter_or: - case nir_intrinsic_atomic_counter_xor: - case nir_intrinsic_atomic_counter_exchange: - case nir_intrinsic_atomic_counter_comp_swap: { - unsigned surf_index = prog_data->base.binding_table.abo_start + - (unsigned) instr->const_index[0]; - const vec4_builder bld = - vec4_builder(this).at_end().annotate(current_annotation, base_ir); - - /* Get some metadata from the image intrinsic. */ - const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; - - /* Get the arguments of the atomic intrinsic. */ - src_reg offset = get_nir_src(instr->src[0], nir_type_int32, - instr->num_components); - const src_reg surface = brw_imm_ud(surf_index); - const src_reg src0 = (info->num_srcs >= 2 - ? get_nir_src(instr->src[1]) : src_reg()); - const src_reg src1 = (info->num_srcs >= 3 - ? get_nir_src(instr->src[2]) : src_reg()); - - src_reg tmp; - - dest = get_nir_dest(instr->dest); - - if (instr->intrinsic == nir_intrinsic_atomic_counter_read) { - tmp = emit_untyped_read(bld, surface, offset, 1, 1); - } else { - tmp = emit_untyped_atomic(bld, surface, offset, - src0, src1, - 1, 1, - get_atomic_counter_op(instr->intrinsic)); - } - - bld.MOV(retype(dest, tmp.type), tmp); - brw_mark_surface_used(stage_prog_data, surf_index); - break; - } - case nir_intrinsic_load_ubo: { nir_const_value *const_block_index = nir_src_as_const_value(instr->src[0]); src_reg surf_index; |