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authorKenneth Graunke <[email protected]>2017-12-10 17:03:32 -0800
committerKenneth Graunke <[email protected]>2017-12-30 20:30:34 -0800
commita1afef8de0118a5952e21fec7e017c905a59637f (patch)
treeccb64c03c180f8d85b375278b5d60d9bdd516abb /src/intel/compiler/brw_vec4_nir.cpp
parentea0bbe82019458f3c0482a2d13614fdd06041ee3 (diff)
i965: Combine {VS,FS}_OPCODE_GET_BUFFER_SIZE opcodes.
These are the same, we don't need a separate opcode enum per backend. Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_vec4_nir.cpp')
-rw-r--r--src/intel/compiler/brw_vec4_nir.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index 4ff3ef9927e..7131fa06b4a 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -455,7 +455,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
prog_data->base.binding_table.ssbo_start + ssbo_index;
dst_reg result_dst = get_nir_dest(instr->dest);
vec4_instruction *inst = new(mem_ctx)
- vec4_instruction(VS_OPCODE_GET_BUFFER_SIZE, result_dst);
+ vec4_instruction(SHADER_OPCODE_GET_BUFFER_SIZE, result_dst);
inst->base_mrf = 2;
inst->mlen = 1; /* always at least one */