diff options
| author | Jason Ekstrand <[email protected]> | 2019-02-21 10:41:59 -0600 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2019-02-28 16:58:20 -0600 |
| commit | e8f863e7189076d7005c4586f1512d0f87afc1d8 (patch) | |
| tree | 3e53030eb9000bf0eaabf647ca6b55c82902de3c /src/intel/compiler/brw_vec4.cpp | |
| parent | 95ae400abcda4f692fd31c9132462d904f939ec3 (diff) | |
intel/compiler: Re-prefix non-logical surface opcodes with VEC4
The scalar back-end uses SHADER_OPCODE_SEND for all surface messages so
we no longer need the non-logical opcodes there. Prefix them VEC4 so
it's clear that they're only used by the vec4 back-end.
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_vec4.cpp')
| -rw-r--r-- | src/intel/compiler/brw_vec4.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp index 74f3539af2d..fe368518fba 100644 --- a/src/intel/compiler/brw_vec4.cpp +++ b/src/intel/compiler/brw_vec4.cpp @@ -153,9 +153,9 @@ vec4_instruction::is_send_from_grf() switch (opcode) { case SHADER_OPCODE_SHADER_TIME_ADD: case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7: - case SHADER_OPCODE_UNTYPED_ATOMIC: - case SHADER_OPCODE_UNTYPED_SURFACE_READ: - case SHADER_OPCODE_UNTYPED_SURFACE_WRITE: + case VEC4_OPCODE_UNTYPED_ATOMIC: + case VEC4_OPCODE_UNTYPED_SURFACE_READ: + case VEC4_OPCODE_UNTYPED_SURFACE_WRITE: case VEC4_OPCODE_URB_READ: case TCS_OPCODE_URB_WRITE: case TCS_OPCODE_RELEASE_INPUT: @@ -209,9 +209,9 @@ vec4_instruction::size_read(unsigned arg) const { switch (opcode) { case SHADER_OPCODE_SHADER_TIME_ADD: - case SHADER_OPCODE_UNTYPED_ATOMIC: - case SHADER_OPCODE_UNTYPED_SURFACE_READ: - case SHADER_OPCODE_UNTYPED_SURFACE_WRITE: + case VEC4_OPCODE_UNTYPED_ATOMIC: + case VEC4_OPCODE_UNTYPED_SURFACE_READ: + case VEC4_OPCODE_UNTYPED_SURFACE_WRITE: case TCS_OPCODE_URB_WRITE: if (arg == 0) return mlen * REG_SIZE; |