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authorJason Ekstrand <[email protected]>2019-02-21 10:14:17 -0600
committerJason Ekstrand <[email protected]>2019-02-28 16:58:20 -0600
commitaeaba24fcb98839be73a59f6bb74a39523d79a3d (patch)
treeed108ed75c232405b247442ca594758d236c70d9 /src/intel/compiler/brw_vec4.cpp
parenta04c73721591d4b8174f32e5d1fe5db2a5157ea4 (diff)
intel/compiler: Drop unused surface opcodes
The unused typed surface read/write support in the vec4 back-end has been dropped and the fs back-end now uses SHADER_OPCODE_SEND for all image and buffer ops. There's no reason to keep these opcodes around anymore. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_vec4.cpp')
-rw-r--r--src/intel/compiler/brw_vec4.cpp6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
index 4489c682d01..74f3539af2d 100644
--- a/src/intel/compiler/brw_vec4.cpp
+++ b/src/intel/compiler/brw_vec4.cpp
@@ -156,9 +156,6 @@ vec4_instruction::is_send_from_grf()
case SHADER_OPCODE_UNTYPED_ATOMIC:
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
- case SHADER_OPCODE_TYPED_ATOMIC:
- case SHADER_OPCODE_TYPED_SURFACE_READ:
- case SHADER_OPCODE_TYPED_SURFACE_WRITE:
case VEC4_OPCODE_URB_READ:
case TCS_OPCODE_URB_WRITE:
case TCS_OPCODE_RELEASE_INPUT:
@@ -215,9 +212,6 @@ vec4_instruction::size_read(unsigned arg) const
case SHADER_OPCODE_UNTYPED_ATOMIC:
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
- case SHADER_OPCODE_TYPED_ATOMIC:
- case SHADER_OPCODE_TYPED_SURFACE_READ:
- case SHADER_OPCODE_TYPED_SURFACE_WRITE:
case TCS_OPCODE_URB_WRITE:
if (arg == 0)
return mlen * REG_SIZE;