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| author | Samuel Iglesias Gonsálvez <[email protected]> | 2016-08-25 16:05:24 +0200 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2017-04-14 14:56:08 -0700 |
| commit | a5399e8b1cc3e2e12b8aa067e8380d1b088c35ca (patch) | |
| tree | baf42e6a2b78f06eb592745419f7131969400e83 /src/intel/compiler/brw_vec4.cpp | |
| parent | ebfb703d443a4b22320c3f1eed34e6e1aa54e998 (diff) | |
i965/fs: lower all non-force_writemask_all DF instructions to SIMD4 on IVB/BYT
The hardware applies the same channel enable signals to both halves of
the compressed instruction which will be just wrong under non-uniform
control flow. Fix this by splitting those instructions to SIMD4.
Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_vec4.cpp')
0 files changed, 0 insertions, 0 deletions