diff options
| author | Matt Turner <[email protected]> | 2020-02-27 16:46:52 -0800 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-03-09 04:44:11 +0000 |
| commit | 3d0821a21676304822d3364e7ba1c064ca523825 (patch) | |
| tree | c397061d38f979f8bf478213d3476e5872b081eb /src/intel/compiler/brw_vec4.cpp | |
| parent | d8f3d0a3a85244450d43da44cb8eed2389969b47 (diff) | |
intel/vec4: Make implied_mrf_writes() a vec4_instruction method
Same as commit c20dc9b8363b (intel/fs: Make implied_mrf_writes() an
fs_inst method.)
Reviewed-by: Ian Romanick <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4093>
Diffstat (limited to 'src/intel/compiler/brw_vec4.cpp')
| -rw-r--r-- | src/intel/compiler/brw_vec4.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp index dad53edc56c..bb0b98316fb 100644 --- a/src/intel/compiler/brw_vec4.cpp +++ b/src/intel/compiler/brw_vec4.cpp @@ -326,13 +326,13 @@ vec4_instruction::can_change_types() const * instruction -- the generate_* functions generate additional MOVs * for setup. */ -int -vec4_visitor::implied_mrf_writes(vec4_instruction *inst) +unsigned +vec4_instruction::implied_mrf_writes() const { - if (inst->mlen == 0 || inst->is_send_from_grf()) + if (mlen == 0 || is_send_from_grf()) return 0; - switch (inst->opcode) { + switch (opcode) { case SHADER_OPCODE_RCP: case SHADER_OPCODE_RSQ: case SHADER_OPCODE_SQRT: @@ -376,7 +376,7 @@ vec4_visitor::implied_mrf_writes(vec4_instruction *inst) case SHADER_OPCODE_TG4_OFFSET: case SHADER_OPCODE_SAMPLEINFO: case SHADER_OPCODE_GET_BUFFER_SIZE: - return inst->header_size; + return header_size; default: unreachable("not reached"); } |