diff options
| author | Alejandro Piñeiro <[email protected]> | 2017-03-28 19:24:12 +0200 |
|---|---|---|
| committer | Alejandro Piñeiro <[email protected]> | 2017-03-29 17:34:15 +0200 |
| commit | 2f8d6bd57844f86547b95d1381c82aaceb83c356 (patch) | |
| tree | 92d211097bd8019210053fd1992418f6c0e7db7c /src/intel/compiler/brw_shader.cpp | |
| parent | a2db9f9ff42435bc952ae1897b76b42610aeb7b7 (diff) | |
i965: expose BRW_OPCODE_[F32TO16/F16TO32] name on gen8+
Technically those hw operations are only available on gen7, as gen8+
support the conversion on the MOV. But, when using the builder to
implement nir operations (example: nir_op_fquantize2f16), it is not
needed to do the gen check. This check is done later, on the final
emission at brw_F32TO16 (brw_eu_emit), choosing between the MOV or the
specific operation accordingly.
So in the middle, during optimization phases those hw operations can
be around for gen8+ too.
Without this patch, several (at least 95) vulkan-cts quantize tests
crashes when using INTEL_DEBUG=optimizer. For example:
dEQP-VK.spirv_assembly.instruction.graphics.opquantize.too_small_vert
v2: simplify the code using GEN_GE (Ilia Mirkin)
v3: tweak brw_instruction_name instead of changing opcode_descs
table, that is used for validation (Matt Turner)
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_shader.cpp')
| -rw-r--r-- | src/intel/compiler/brw_shader.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index bfaa5e7bfe2..73bbc931352 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -157,6 +157,15 @@ brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op) if (devinfo->gen >= 6 && op == BRW_OPCODE_DO) return "do"; + /* The following conversion opcodes doesn't exist on Gen8+, but we use + * then to mark that we want to do the conversion. + */ + if (devinfo->gen > 7 && op == BRW_OPCODE_F32TO16) + return "f32to16"; + + if (devinfo->gen > 7 && op == BRW_OPCODE_F16TO32) + return "f16to32"; + assert(brw_opcode_desc(devinfo, op)->name); return brw_opcode_desc(devinfo, op)->name; case FS_OPCODE_FB_WRITE: |