diff options
author | Jason Ekstrand <[email protected]> | 2018-10-30 15:47:39 -0500 |
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committer | Jason Ekstrand <[email protected]> | 2019-01-29 18:43:55 +0000 |
commit | 8514eba693c9daa07284a248e1c4e5d825152c1c (patch) | |
tree | da0d6f216c0097e97aeb8e4dfca6fb999c691f79 /src/intel/compiler/brw_schedule_instructions.cpp | |
parent | f547cebbe062b094077ed32c8d557c7162c1c4fb (diff) |
intel/fs: Use SHADER_OPCODE_SEND for texturing on gen7+
Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_schedule_instructions.cpp')
-rw-r--r-- | src/intel/compiler/brw_schedule_instructions.cpp | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_schedule_instructions.cpp b/src/intel/compiler/brw_schedule_instructions.cpp index f453bb42574..46d3111045d 100644 --- a/src/intel/compiler/brw_schedule_instructions.cpp +++ b/src/intel/compiler/brw_schedule_instructions.cpp @@ -416,6 +416,23 @@ schedule_node::set_latency_gen7(bool is_haswell) case SHADER_OPCODE_SEND: switch (inst->sfid) { + case BRW_SFID_SAMPLER: { + unsigned msg_type = (inst->desc >> 12) & 0x1f; + switch (msg_type) { + case GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO: + case GEN6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO: + /* See also SHADER_OPCODE_TXS */ + latency = 100; + break; + + default: + /* See also SHADER_OPCODE_TEX */ + latency = 200; + break; + } + break; + } + case GEN6_SFID_DATAPORT_RENDER_CACHE: switch ((inst->desc >> 14) & 0x1f) { case GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE: |