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authorIan Romanick <[email protected]>2018-06-19 13:34:57 -0700
committerIan Romanick <[email protected]>2019-03-01 12:42:14 -0800
commitc9d5bd050c31b6ca20610a5eadd27068bd5c190b (patch)
treeada74758eec2b91404c87509dcfd8edf7dc80162 /src/intel/compiler/brw_nir.h
parenteae19f5f19f57ed669c042fea4f8eb40b8a9e23a (diff)
intel/fs: Relax type matching rules in cmod propagation from MOV instructions
To allow cmod propagation from a MOV in a sequence like: and(16) g31<1>UD g20<8,8,1>UD g22<8,8,1>UD mov.nz.f0(16) null<1>F g31<8,8,1>D A similar change to the vec4 backend had no effect. Somewhere between c1ec5820593 and 40fc4b5acd6 (1,094 commits) the effectiveness of this patch diminished, and as of commit d7e0d47b9de (nir: Add a bunch of b2[if] optimizations) this optimization no longer has any effect on any platform. A later patch "intel/fs: Use De Morgan's laws to avoid logical-not of a logic result on Gen8+," generates some instruction sequences that require this change in order for cmod propagation to make progress. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_nir.h')
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