diff options
author | Lionel Landwerlin <[email protected]> | 2018-06-19 12:11:20 +0100 |
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committer | Lionel Landwerlin <[email protected]> | 2018-07-05 11:57:45 +0100 |
commit | 144b40db541183ba2ee18efa4e1531aabcf9c6e8 (patch) | |
tree | 31aca24834fbadf73102f279ed5232417c6d0bad /src/intel/compiler/brw_nir.c | |
parent | 9d08ef633521c1ea19ed6a8cf275a85cc4c32e1a (diff) |
intel: aubinator: drop the 1Tb GTT mapping
Now that we're softpinning the address of our BOs in anv & i965, the
addresses selected start at the top of the addressing space. This is a
problem for the current implementation of aubinator which uses only a
40bit mmapped address space.
This change keeps track of all the memory writes from the aub file and
fetch them on request by the batch decoder. As a result we can get rid
of the 1<<40 mmapped address space and only rely on the mmap aub file
\o/
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Rafael Antognolli <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_nir.c')
0 files changed, 0 insertions, 0 deletions