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authorJason Ekstrand <[email protected]>2019-08-02 15:19:16 -0500
committerJason Ekstrand <[email protected]>2019-08-03 00:35:48 +0000
commitc02c3ff6121c5f2c8045900c6b83746344f56b32 (patch)
tree2d23bad69b429bfe91266b13ce5f19a116bf63c7 /src/intel/compiler/brw_nir.c
parent2fd30e37220484f44b1cfb1ee9afbe6c8a0b43f0 (diff)
intel/nir: Add a common nir comparison -> cmod helper
We already had one in the vec4 code, we just had move it. Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_nir.c')
-rw-r--r--src/intel/compiler/brw_nir.c39
1 files changed, 39 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 9f56644ce41..18cd13ed66e 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -1041,6 +1041,45 @@ brw_nir_apply_key(nir_shader *nir,
brw_nir_optimize(nir, compiler, is_scalar, false);
}
+enum brw_conditional_mod
+brw_cmod_for_nir_comparison(nir_op op)
+{
+ switch (op) {
+ case nir_op_flt32:
+ case nir_op_ilt32:
+ case nir_op_ult32:
+ return BRW_CONDITIONAL_L;
+
+ case nir_op_fge32:
+ case nir_op_ige32:
+ case nir_op_uge32:
+ return BRW_CONDITIONAL_GE;
+
+ case nir_op_feq32:
+ case nir_op_ieq32:
+ case nir_op_b32all_fequal2:
+ case nir_op_b32all_iequal2:
+ case nir_op_b32all_fequal3:
+ case nir_op_b32all_iequal3:
+ case nir_op_b32all_fequal4:
+ case nir_op_b32all_iequal4:
+ return BRW_CONDITIONAL_Z;
+
+ case nir_op_fne32:
+ case nir_op_ine32:
+ case nir_op_b32any_fnequal2:
+ case nir_op_b32any_inequal2:
+ case nir_op_b32any_fnequal3:
+ case nir_op_b32any_inequal3:
+ case nir_op_b32any_fnequal4:
+ case nir_op_b32any_inequal4:
+ return BRW_CONDITIONAL_NZ;
+
+ default:
+ unreachable("Unsupported NIR comparison op");
+ }
+}
+
enum brw_reg_type
brw_type_for_nir_type(const struct gen_device_info *devinfo, nir_alu_type type)
{