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authorJason Ekstrand <[email protected]>2019-08-02 15:19:16 -0500
committerJason Ekstrand <[email protected]>2019-08-03 00:35:48 +0000
commitc02c3ff6121c5f2c8045900c6b83746344f56b32 (patch)
tree2d23bad69b429bfe91266b13ce5f19a116bf63c7 /src/intel/compiler/brw_fs_nir.cpp
parent2fd30e37220484f44b1cfb1ee9afbe6c8a0b43f0 (diff)
intel/nir: Add a common nir comparison -> cmod helper
We already had one in the vec4 code, we just had move it. Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_fs_nir.cpp')
-rw-r--r--src/intel/compiler/brw_fs_nir.cpp42
1 files changed, 3 insertions, 39 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index b56d7156954..827096241f3 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1298,25 +1298,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
if (bit_size != 32)
dest = bld.vgrf(op[0].type, 1);
- brw_conditional_mod cond;
- switch (instr->op) {
- case nir_op_flt32:
- cond = BRW_CONDITIONAL_L;
- break;
- case nir_op_fge32:
- cond = BRW_CONDITIONAL_GE;
- break;
- case nir_op_feq32:
- cond = BRW_CONDITIONAL_Z;
- break;
- case nir_op_fne32:
- cond = BRW_CONDITIONAL_NZ;
- break;
- default:
- unreachable("bad opcode");
- }
-
- bld.CMP(dest, op[0], op[1], cond);
+ bld.CMP(dest, op[0], op[1], brw_cmod_for_nir_comparison(instr->op));
if (bit_size > 32) {
bld.MOV(result, subscript(dest, BRW_REGISTER_TYPE_UD, 0));
@@ -1351,26 +1333,8 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
if (bit_size != 32)
dest = bld.vgrf(temp_op[0].type, 1);
- brw_conditional_mod cond;
- switch (instr->op) {
- case nir_op_ilt32:
- case nir_op_ult32:
- cond = BRW_CONDITIONAL_L;
- break;
- case nir_op_ige32:
- case nir_op_uge32:
- cond = BRW_CONDITIONAL_GE;
- break;
- case nir_op_ieq32:
- cond = BRW_CONDITIONAL_Z;
- break;
- case nir_op_ine32:
- cond = BRW_CONDITIONAL_NZ;
- break;
- default:
- unreachable("bad opcode");
- }
- bld.CMP(dest, temp_op[0], temp_op[1], cond);
+ bld.CMP(dest, temp_op[0], temp_op[1],
+ brw_cmod_for_nir_comparison(instr->op));
if (bit_size > 32) {
bld.MOV(result, subscript(dest, BRW_REGISTER_TYPE_UD, 0));