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authorJason Ekstrand <[email protected]>2017-08-21 22:17:37 -0700
committerJason Ekstrand <[email protected]>2018-03-07 12:13:47 -0800
commit974daec495eae05b3c3179cd6c131a65ff2efcc7 (patch)
tree0d147a887cc221b4eea591837ad8d886231644a1 /src/intel/compiler/brw_fs_nir.cpp
parentadc077797aa8abb74a7aa539b1601e405f150f5f (diff)
i965/fs: Implement basic SPIR-V subgroup intrinsics
Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_fs_nir.cpp')
-rw-r--r--src/intel/compiler/brw_fs_nir.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 554d61d71af..651997bb6ff 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -4501,6 +4501,14 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
break;
}
+ case nir_intrinsic_first_invocation: {
+ fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD);
+ bld.exec_all().emit(SHADER_OPCODE_FIND_LIVE_CHANNEL, tmp);
+ bld.MOV(retype(dest, BRW_REGISTER_TYPE_UD),
+ fs_reg(component(tmp, 0)));
+ break;
+ }
+
default:
unreachable("unknown intrinsic");
}