diff options
author | Jose Maria Casanova Crespo <[email protected]> | 2018-06-09 11:45:50 +0200 |
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committer | Jose Maria Casanova Crespo <[email protected]> | 2018-06-16 22:39:08 +0200 |
commit | fd3d8a8f796f9a15796b1c2f680dfac4bddb5c7e (patch) | |
tree | a76fe34aeecaeb056f5a777a7e822c85c6974393 /src/intel/compiler/brw_fs_nir.cpp | |
parent | 20e4732f7de89ebec9dfe50902cb12d508d69f78 (diff) |
intel/fs: Use shuffle_for_32bit_write for 16-bits store_ssbo
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_fs_nir.cpp')
-rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 5cad31b32d9..96ebb236a40 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -4297,11 +4297,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr * aligned. Shuffling only one component would be the same as * striding it. */ - fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_D, - DIV_ROUND_UP(num_components, 2)); - shuffle_16bit_data_for_32bit_write(bld, tmp, write_src, - num_components); - write_src = tmp; + write_src = shuffle_for_32bit_write(bld, write_src, 0, + num_components); } fs_reg offset_reg; |