diff options
| author | Jason Ekstrand <[email protected]> | 2019-09-01 22:12:07 -0500 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2019-09-06 03:58:09 +0000 |
| commit | d15fe8ca8262d502435c4f83985ac414f950bc5f (patch) | |
| tree | 06893693485af114474d618f898409fbaf01e332 /src/intel/compiler/brw_fs_generator.cpp | |
| parent | 47e974354715702a75ad2f1ee803b72cbd8cc9f1 (diff) | |
Revert "intel/fs: Move the scalar-region conversion to the generator."
This reverts commit c0504569eac5e5c305e9f0c240e248aca9d8891f. Now that
we're doing interpolation lowering in NIR, we can continue to stride the
FS input registers directly in the brw_fs_nir code like we did before.
This fixes SIMD32 fragment shaders which broke because lower_simd_width
depended on the 0 stride to split PLN instructions correctly.
Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_fs_generator.cpp')
| -rw-r--r-- | src/intel/compiler/brw_fs_generator.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 885e799ae76..b6e6925ac9e 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -795,7 +795,7 @@ fs_generator::generate_linterp(fs_inst *inst, */ struct brw_reg delta_x = src[0]; struct brw_reg delta_y = offset(src[0], inst->exec_size / 8); - struct brw_reg interp = stride(src[1], 0, 1, 0); + struct brw_reg interp = src[1]; brw_inst *i[2]; /* nir_lower_interpolation() will do the lowering to MAD instructions for |