diff options
| author | Caio Marcelo de Oliveira Filho <[email protected]> | 2020-01-02 15:27:58 -0800 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-01-21 23:41:35 +0000 |
| commit | 18e72ee2108a9388b8d1890311dd22f69886438a (patch) | |
| tree | 5a8d475fde9cdbd97b6b4b6872ed966748d84efc /src/intel/compiler/brw_fs_generator.cpp | |
| parent | 9d964da19fb596dad68c9402c115d6c5784989ee (diff) | |
intel/fs: Add FS_OPCODE_SCHEDULING_FENCE
Like a SHADER_OPCODE_MEMORY_FENCE but doesn't doesn't generate any
assembly code.
Will be used when the compiler shouldn't reorder certain instructions
but there's no need to generate code for the HW to do it -- as the
ordering will be guaranteed by other means.
Reviewed-by: Francisco Jerez <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3226>
Diffstat (limited to 'src/intel/compiler/brw_fs_generator.cpp')
| -rw-r--r-- | src/intel/compiler/brw_fs_generator.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 65beebf6d09..e8bbce5b290 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -2177,6 +2177,11 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, send_count++; break; + case FS_OPCODE_SCHEDULING_FENCE: + if (unlikely(debug_flag)) + disasm_info->use_tail = true; + break; + case SHADER_OPCODE_INTERLOCK: assert(devinfo->gen >= 9); /* The interlock is basically a memory fence issued via sendc */ |