diff options
| author | Iago Toral Quiroga <[email protected]> | 2018-07-27 13:38:38 +0200 |
|---|---|---|
| committer | Iago Toral Quiroga <[email protected]> | 2018-08-01 08:08:15 +0200 |
| commit | 7e6c8b0cb75f41de18d3f2e7f91d6eb2522e939f (patch) | |
| tree | 3228171927300c196938fd982fbf499033fcfe1d /src/intel/compiler/brw_fs.h | |
| parent | bd56e117ff8c4565388717cdfd30cf256c71c6cf (diff) | |
intel/compiler: add setup_imm_(u)b helpers
The hardware doesn't support byte immediates, so similar to setup_imm_df()
for doubles, these helpers work by loading the constant value into a
VGRF.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_fs.h')
| -rw-r--r-- | src/intel/compiler/brw_fs.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 8ccd1659075..d56e33715ee 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -540,6 +540,12 @@ fs_reg shuffle_for_32bit_write(const brw::fs_builder &bld, fs_reg setup_imm_df(const brw::fs_builder &bld, double v); +fs_reg setup_imm_b(const brw::fs_builder &bld, + int8_t v); + +fs_reg setup_imm_ub(const brw::fs_builder &bld, + uint8_t v); + enum brw_barycentric_mode brw_barycentric_mode(enum glsl_interp_mode mode, nir_intrinsic_op op); |