diff options
author | Jason Ekstrand <[email protected]> | 2018-11-26 15:15:04 -0600 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2019-02-01 16:11:00 -0600 |
commit | e644ed468f986b44310b1cc5d5695ed4d473223d (patch) | |
tree | bb620eb5a21037a657b07372ccb13f2e3c91853c /src/intel/compiler/brw_fs.cpp | |
parent | a91f3920738b2f6363397133cf5cfaceea62e506 (diff) |
intel/fs: Implement nir_intrinsic_global_atomic_*
eviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_fs.cpp')
-rw-r--r-- | src/intel/compiler/brw_fs.cpp | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 28a6b44ea49..5a18ba86a96 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -797,6 +797,35 @@ fs_inst::components_read(unsigned i) const assert(src[2].file == IMM); return i == 1 ? src[2].ud : 1; + case SHADER_OPCODE_A64_UNTYPED_ATOMIC_LOGICAL: + assert(src[2].file == IMM); + if (i == 1) { + /* Data source */ + const unsigned op = src[2].ud; + switch (op) { + case BRW_AOP_INC: + case BRW_AOP_DEC: + case BRW_AOP_PREDEC: + return 0; + case BRW_AOP_CMPWR: + return 2; + default: + return 1; + } + } else { + return 1; + } + + case SHADER_OPCODE_A64_UNTYPED_ATOMIC_FLOAT_LOGICAL: + assert(src[2].file == IMM); + if (i == 1) { + /* Data source */ + const unsigned op = src[2].ud; + return op == BRW_AOP_FCMPWR ? 2 : 1; + } else { + return 1; + } + case SHADER_OPCODE_BYTE_SCATTERED_READ_LOGICAL: /* Scattered logical opcodes use the following params: * src[0] Surface coordinates @@ -5292,6 +5321,18 @@ lower_a64_logical_send(const fs_builder &bld, fs_inst *inst) true /* write */); break; + case SHADER_OPCODE_A64_UNTYPED_ATOMIC_LOGICAL: + desc = brw_dp_a64_untyped_atomic_desc(devinfo, inst->exec_size, 32, + arg, /* atomic_op */ + !inst->dst.is_null()); + break; + + case SHADER_OPCODE_A64_UNTYPED_ATOMIC_FLOAT_LOGICAL: + desc = brw_dp_a64_untyped_atomic_float_desc(devinfo, inst->exec_size, + arg, /* atomic_op */ + !inst->dst.is_null()); + break; + default: unreachable("Unknown A64 logical instruction"); } @@ -5492,6 +5533,8 @@ fs_visitor::lower_logical_sends() case SHADER_OPCODE_A64_UNTYPED_READ_LOGICAL: case SHADER_OPCODE_A64_BYTE_SCATTERED_WRITE_LOGICAL: case SHADER_OPCODE_A64_BYTE_SCATTERED_READ_LOGICAL: + case SHADER_OPCODE_A64_UNTYPED_ATOMIC_LOGICAL: + case SHADER_OPCODE_A64_UNTYPED_ATOMIC_FLOAT_LOGICAL: lower_a64_logical_send(ibld, inst); break; @@ -5998,6 +6041,10 @@ get_lowered_simd_width(const struct gen_device_info *devinfo, case SHADER_OPCODE_A64_BYTE_SCATTERED_READ_LOGICAL: return devinfo->gen <= 8 ? 8 : MIN2(16, inst->exec_size); + case SHADER_OPCODE_A64_UNTYPED_ATOMIC_LOGICAL: + case SHADER_OPCODE_A64_UNTYPED_ATOMIC_FLOAT_LOGICAL: + return 8; + case SHADER_OPCODE_URB_READ_SIMD8: case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT: case SHADER_OPCODE_URB_WRITE_SIMD8: |