diff options
| author | Kenneth Graunke <[email protected]> | 2019-05-03 14:28:51 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2019-05-14 13:16:27 -0700 |
| commit | 3d84fd29e8b1dcd3501c19c67d2f2213ea9275cf (patch) | |
| tree | c77321ca8d7c8bc2596cf17a794b61c434d3c537 /src/intel/compiler/brw_fs.cpp | |
| parent | f0d52cf2b0ae1db156e4f1e34982c2a388fcfe58 (diff) | |
intel/compiler: Don't repeat dispatch max fixing condition
Having a single flag will keep both places in sync if the condition
gets more complicated.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_fs.cpp')
| -rw-r--r-- | src/intel/compiler/brw_fs.cpp | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 8fda5ce2af9..9d05800d1fe 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -7437,8 +7437,11 @@ fs_visitor::run_tcs_single_patch() /* Initialize gl_InvocationID */ set_tcs_invocation_id(); + const bool fix_dispatch_mask = + (nir->info.tess.tcs_vertices_out % 8) != 0; + /* Fix the disptach mask */ - if (nir->info.tess.tcs_vertices_out % 8) { + if (fix_dispatch_mask) { bld.CMP(bld.null_reg_ud(), invocation_id, brw_imm_ud(nir->info.tess.tcs_vertices_out), BRW_CONDITIONAL_L); bld.IF(BRW_PREDICATE_NORMAL); @@ -7446,7 +7449,7 @@ fs_visitor::run_tcs_single_patch() emit_nir_code(); - if (nir->info.tess.tcs_vertices_out % 8) { + if (fix_dispatch_mask) { bld.emit(BRW_OPCODE_ENDIF); } |