diff options
| author | Matt Turner <[email protected]> | 2017-07-25 13:16:25 -0700 |
|---|---|---|
| committer | Matt Turner <[email protected]> | 2017-08-21 14:05:23 -0700 |
| commit | 8815b9677ff70723ee55f2e567d50c1d4e9762b3 (patch) | |
| tree | 1f35a3b1b8323be588a5893a71d85d1339bd88a9 /src/intel/compiler/brw_fs.cpp | |
| parent | ce6b8627d87f14e15f2f4bbc6034b32c34557cb3 (diff) | |
i965: Reorder brw_reg_type enum values
These vaguely corresponded to the hardware encodings, but that is purely
historical at this point. Reorder them so we stop making things "almost
work" when mixing enums.
The ordering has been closen so that no enum value is the same as a
compatible hardware encoding.
Reviewed-by: Scott D Phillips <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_fs.cpp')
| -rw-r--r-- | src/intel/compiler/brw_fs.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index fdc30d450cc..0ea4c4f1ccb 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -403,6 +403,7 @@ void fs_reg::init() { memset(this, 0, sizeof(*this)); + type = BRW_REGISTER_TYPE_UD; stride = 1; } |