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authorFrancisco Jerez <[email protected]>2018-01-23 19:23:20 -0800
committerFrancisco Jerez <[email protected]>2019-10-11 12:24:16 -0700
commit057902dcf8d287f0b110b03f67ae33d338a7497c (patch)
tree0d7666abc6739224fecac2154d98833ff1bb44b5 /src/intel/compiler/brw_eu_validate.c
parent25dd67099df301f09ce40b8f9c5a3bbc857e367c (diff)
intel/eu: Encode and decode native instruction opcodes from/to IR opcodes.
Change brw_inst_set_opcode() and brw_inst_opcode() to call brw_opcode_encode/decode() transparently in order to translate between hardware and IR opcodes, and update the EU compaction code in order to do the same as needed, so we can eventually drop the one-to-one correspondence between hardware and IR opcodes. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_eu_validate.c')
-rw-r--r--src/intel/compiler/brw_eu_validate.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c
index 9b31b99ed2b..d0a5ca9e203 100644
--- a/src/intel/compiler/brw_eu_validate.c
+++ b/src/intel/compiler/brw_eu_validate.c
@@ -310,6 +310,8 @@ inst_uses_src_acc(const struct gen_device_info *devinfo, const brw_inst *inst)
case BRW_OPCODE_MACH:
case BRW_OPCODE_SADA2:
return true;
+ default:
+ break;
}
/* FIXME: support 3-src instructions */
@@ -389,7 +391,7 @@ static bool
is_unsupported_inst(const struct gen_device_info *devinfo,
const brw_inst *inst)
{
- return brw_opcode_desc(devinfo, brw_inst_opcode(devinfo, inst)) == NULL;
+ return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_ILLEGAL;
}
/**