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authorJason Ekstrand <[email protected]>2019-05-22 12:36:17 -0500
committerJason Ekstrand <[email protected]>2019-05-30 14:00:26 +0000
commit9e403dc56e3ab702abc68fd65ed4ab324ba69e69 (patch)
tree27009ed2414fb42f36143fdfa5efff3c924d0fdc /src/intel/compiler/brw_eu_emit.c
parent859de4a74857d2736f6e2dd9d2fd98b92bbc69d9 (diff)
intel/fs: Do a stalling MFENCE in endInvocationInterlock()
Fixes: 939312702e "i965: Add ARB_fragment_shader_interlock support" Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_eu_emit.c')
-rw-r--r--src/intel/compiler/brw_eu_emit.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 181932705f3..7b8783ee3d1 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -3038,10 +3038,11 @@ void
brw_memory_fence(struct brw_codegen *p,
struct brw_reg dst,
struct brw_reg src,
- enum opcode send_op)
+ enum opcode send_op,
+ bool stall)
{
const struct gen_device_info *devinfo = p->devinfo;
- const bool commit_enable =
+ const bool commit_enable = stall ||
devinfo->gen >= 10 || /* HSD ES # 1404612949 */
(devinfo->gen == 7 && !devinfo->is_haswell);
struct brw_inst *insn;
@@ -3080,6 +3081,9 @@ brw_memory_fence(struct brw_codegen *p,
brw_MOV(p, dst, offset(dst, 1));
}
+ if (stall)
+ brw_MOV(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UW), dst);
+
brw_pop_insn_state(p);
}