diff options
| author | Plamena Manolova <[email protected]> | 2018-04-27 15:06:56 +0100 |
|---|---|---|
| committer | Plamena Manolova <[email protected]> | 2018-06-01 16:36:39 +0100 |
| commit | 939312702e35928770e5f90f7b053ece3d10e7ae (patch) | |
| tree | f82406635ed7400b46173053f6252d3b86926a5b /src/intel/compiler/brw_eu_emit.c | |
| parent | 60e843c4d5a5688196d13611a357cdc5b1b1141d (diff) | |
i965: Add ARB_fragment_shader_interlock support.
Adds suppport for ARB_fragment_shader_interlock. We achieve
the interlock and fragment ordering by issuing a memory fence
via sendc.
Signed-off-by: Plamena Manolova <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_eu_emit.c')
| -rw-r--r-- | src/intel/compiler/brw_eu_emit.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 6d81c636f27..c442f8cc6f4 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -3288,7 +3288,8 @@ brw_set_memory_fence_message(struct brw_codegen *p, void brw_memory_fence(struct brw_codegen *p, - struct brw_reg dst) + struct brw_reg dst, + enum opcode send_op) { const struct gen_device_info *devinfo = p->devinfo; const bool commit_enable = @@ -3304,7 +3305,7 @@ brw_memory_fence(struct brw_codegen *p, /* Set dst as destination for dependency tracking, the MEMORY_FENCE * message doesn't write anything back. */ - insn = next_insn(p, BRW_OPCODE_SEND); + insn = next_insn(p, send_op); dst = retype(dst, BRW_REGISTER_TYPE_UW); brw_set_dest(p, insn, dst); brw_set_src0(p, insn, dst); @@ -3316,7 +3317,7 @@ brw_memory_fence(struct brw_codegen *p, * flush it too. Use a different register so both flushes can be * pipelined by the hardware. */ - insn = next_insn(p, BRW_OPCODE_SEND); + insn = next_insn(p, send_op); brw_set_dest(p, insn, offset(dst, 1)); brw_set_src0(p, insn, offset(dst, 1)); brw_set_memory_fence_message(p, insn, GEN6_SFID_DATAPORT_RENDER_CACHE, |