diff options
author | Jose Maria Casanova Crespo <[email protected]> | 2017-07-01 08:16:01 +0200 |
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committer | Jose Maria Casanova Crespo <[email protected]> | 2017-12-06 08:57:18 +0100 |
commit | f1a9936ee1c7d2abe641eb785786c908c5ed799c (patch) | |
tree | a7a59655005f2c8d5d19c38dbf14e22a5174af02 /src/intel/compiler/brw_eu.h | |
parent | d038deaa400c819e5867d1e417849b124ccd07b3 (diff) |
i965/fs: Add byte scattered write message and fs support
v2: (Jason Ekstrand)
- Enable bit_size parameter to scattered messages to enable different
bitsizes byte/word/dword.
- Remove use of brw_send_indirect_scattered_message in favor of
brw_send_indirect_surface_message.
- Move scattered messages to surface messages namespace.
- Assert align1 for scattered messages and assume Gen8+.
- Inline brw_set_dp_byte_scattered_write.
v3: - Remove leftover newline (Topi Pohjolainen)
- Rename brw_data_size to brw_scattered_data_element and use
defines instead of an enum (Jason Ekstrand)
- Assert scattered write for Gen8+ and Haswell (Jason Ekstrand)
Signed-off-by: Jose Maria Casanova Crespo <[email protected]>
Signed-off-by: Alejandro PiƱeiro <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_eu.h')
-rw-r--r-- | src/intel/compiler/brw_eu.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h index 343dcd867db..3ac3b4342a9 100644 --- a/src/intel/compiler/brw_eu.h +++ b/src/intel/compiler/brw_eu.h @@ -486,6 +486,13 @@ brw_typed_surface_write(struct brw_codegen *p, unsigned num_channels); void +brw_byte_scattered_write(struct brw_codegen *p, + struct brw_reg payload, + struct brw_reg surface, + unsigned msg_length, + unsigned bit_size); + +void brw_memory_fence(struct brw_codegen *p, struct brw_reg dst); |