diff options
author | Jason Ekstrand <[email protected]> | 2017-08-31 09:41:22 -0700 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2017-11-07 10:37:52 -0800 |
commit | 8280560705d95dbbb059c20adddfd220d7efe593 (patch) | |
tree | 9830929f2c184ef89f45bd81bde51e9e584e90d4 /src/intel/compiler/brw_eu.h | |
parent | 7a82ad54bb56cafaeea7f909cd9fc35542c23ba0 (diff) |
intel/eu: Make automatic exec sizes a configurable option
We have had a feature in codegen for some time that tries to
automatically infer the execution size of an instruction from the width
of its destination. For things such as fixed function GS, clipper, and
SF programs, this is very useful because they tend to have lots of
hand-rolled register setup and trying to specify the exec size all the
time would be prohibitive. For things that come from a higher-level IR,
however, it's easier to just set the right size all the time and the
automatic exec sizes can, in fact, cause problems. This commit makes it
optional while enabling it by default.
Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_eu.h')
-rw-r--r-- | src/intel/compiler/brw_eu.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h index d8c9be2e544..95503d55135 100644 --- a/src/intel/compiler/brw_eu.h +++ b/src/intel/compiler/brw_eu.h @@ -65,6 +65,16 @@ struct brw_codegen { bool compressed_stack[BRW_EU_MAX_INSN_STACK]; brw_inst *current; + /** Whether or not the user wants automatic exec sizes + * + * If true, codegen will try to automatically infer the exec size of an + * instruction from the width of the destination register. If false, it + * will take whatever is set by brw_set_default_exec_size verbatim. + * + * This is set to true by default in brw_init_codegen. + */ + bool automatic_exec_sizes; + bool single_program_flow; const struct gen_device_info *devinfo; |