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authorFrancisco Jerez <[email protected]>2019-02-05 20:53:06 -0800
committerFrancisco Jerez <[email protected]>2019-10-11 12:24:16 -0700
commit0e57dbc55cd7f42a2298dbaa4e18fe97a85fd0d2 (patch)
tree15c11724a91613d254d366409159edb9d40b1ae9 /src/intel/compiler/brw_eu.cpp
parent7499e10383bb4182b1bf3edb90e1915fdf0c6d33 (diff)
intel/ir/gen12: Add SYNC hardware instruction.
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_eu.cpp')
-rw-r--r--src/intel/compiler/brw_eu.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_eu.cpp b/src/intel/compiler/brw_eu.cpp
index a8c3e55f65f..54c8511ae8d 100644
--- a/src/intel/compiler/brw_eu.cpp
+++ b/src/intel/compiler/brw_eu.cpp
@@ -467,6 +467,7 @@ enum gen {
static const struct opcode_desc opcode_descs[] = {
/* IR, HW, name, nsrc, ndst, gens */
{ BRW_OPCODE_ILLEGAL, 0, "illegal", 0, 0, GEN_ALL },
+ { BRW_OPCODE_SYNC, 1, "sync", 1, 0, GEN_GE(GEN12) },
{ BRW_OPCODE_MOV, 1, "mov", 1, 1, GEN_LT(GEN12) },
{ BRW_OPCODE_MOV, 97, "mov", 1, 1, GEN_GE(GEN12) },
{ BRW_OPCODE_SEL, 2, "sel", 2, 1, GEN_LT(GEN12) },