diff options
| author | Jason Ekstrand <[email protected]> | 2017-08-31 09:41:22 -0700 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2017-11-07 10:37:52 -0800 |
| commit | 8280560705d95dbbb059c20adddfd220d7efe593 (patch) | |
| tree | 9830929f2c184ef89f45bd81bde51e9e584e90d4 /src/intel/compiler/brw_eu.c | |
| parent | 7a82ad54bb56cafaeea7f909cd9fc35542c23ba0 (diff) | |
intel/eu: Make automatic exec sizes a configurable option
We have had a feature in codegen for some time that tries to
automatically infer the execution size of an instruction from the width
of its destination. For things such as fixed function GS, clipper, and
SF programs, this is very useful because they tend to have lots of
hand-rolled register setup and trying to specify the exec size all the
time would be prohibitive. For things that come from a higher-level IR,
however, it's easier to just set the right size all the time and the
automatic exec sizes can, in fact, cause problems. This commit makes it
optional while enabling it by default.
Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/intel/compiler/brw_eu.c')
| -rw-r--r-- | src/intel/compiler/brw_eu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_eu.c b/src/intel/compiler/brw_eu.c index b0bdc38f4b5..bc297a21b32 100644 --- a/src/intel/compiler/brw_eu.c +++ b/src/intel/compiler/brw_eu.c @@ -296,6 +296,7 @@ brw_init_codegen(const struct gen_device_info *devinfo, memset(p, 0, sizeof(*p)); p->devinfo = devinfo; + p->automatic_exec_sizes = true; /* * Set the initial instruction store array size to 1024, if found that * isn't enough, then it will double the store size at brw_next_insn() |