diff options
author | Eric Engestrom <[email protected]> | 2018-10-28 16:46:21 +0000 |
---|---|---|
committer | Eric Engestrom <[email protected]> | 2018-10-30 10:59:43 +0000 |
commit | fddf384d1dec0a67b3862b590258997971d830e3 (patch) | |
tree | 18de9e79df977a7482b2fb032e3448a23cb1a5da /src/intel/common | |
parent | e9fb81375ac5d1fa14ee25a3537d86747e2d9217 (diff) |
intel/batch-decoder: remove never-used function
This function was there when the file was introduced in commit
38f10d5a03542c60a589 "intel: tools: add aubinator viewer", but was
never actually used.
Signed-off-by: Eric Engestrom <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
Diffstat (limited to 'src/intel/common')
-rw-r--r-- | src/intel/common/gen_batch_decoder.c | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/src/intel/common/gen_batch_decoder.c b/src/intel/common/gen_batch_decoder.c index 0a36b1678b5..63f04627572 100644 --- a/src/intel/common/gen_batch_decoder.c +++ b/src/intel/common/gen_batch_decoder.c @@ -792,27 +792,6 @@ struct custom_decoder { { "MI_LOAD_REGISTER_IMM", decode_load_register_imm } }; -static inline uint64_t -get_address(struct gen_spec *spec, const uint32_t *p) -{ - /* Addresses are always guaranteed to be page-aligned and sometimes - * hardware packets have extra stuff stuffed in the bottom 12 bits. - */ - uint64_t addr = p[0] & ~0xfffu; - - if (gen_spec_get_gen(spec) >= gen_make_gen(8,0)) { - /* On Broadwell and above, we have 48-bit addresses which consume two - * dwords. Some packets require that these get stored in a "canonical - * form" which means that bit 47 is sign-extended through the upper - * bits. In order to correctly handle those aub dumps, we need to mask - * off the top 16 bits. - */ - addr |= ((uint64_t)p[1] & 0xffff) << 32; - } - - return addr; -} - void gen_print_batch(struct gen_batch_decode_ctx *ctx, const uint32_t *batch, uint32_t batch_size, |