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authorAnuj Phogat <[email protected]>2017-06-06 16:14:19 -0700
committerAnuj Phogat <[email protected]>2017-06-06 21:30:51 -0700
commit8d02916e0c083f57bc7dfd886333f099763bd998 (patch)
tree7d248a5dfbb952f80ab187504454f5fc396d3d82 /src/intel/common
parent86eff151b1252fca5942390bace106b82caa9725 (diff)
intel: Fix broxton 2x6 way size computation
This patch is undoing the changes to way size computation in broxton 2x6, made by below commit: Commit: 0d576fbfbe912cf3fb9ab594bb31eb58bccf2138 Author: Anuj Phogat <[email protected]> i965: Simplify l3 way size computations By making use of l3_banks field in gen_device_info struct l3_way_size for gen7+ = 2 * l3_banks. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101306 Signed-off-by: Anuj Phogat <[email protected]> Tested-by: Mark Janes <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/common')
-rw-r--r--src/intel/common/gen_l3_config.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c
index e0825e92d9f..2520838e7d9 100644
--- a/src/intel/common/gen_l3_config.c
+++ b/src/intel/common/gen_l3_config.c
@@ -255,6 +255,10 @@ static unsigned
get_l3_way_size(const struct gen_device_info *devinfo)
{
assert(devinfo->l3_banks);
+
+ if (devinfo->is_broxton)
+ return 4;
+
return 2 * devinfo->l3_banks;
}