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authorLionel Landwerlin <[email protected]>2018-09-04 15:45:32 +0100
committerLionel Landwerlin <[email protected]>2019-03-07 15:08:31 +0000
commitbf93084f44965d1daae688fae46615d310e41385 (patch)
tree5088effffba6f804f907a7233b4931512818e118 /src/intel/common
parentacb50d6b1ff1b73a66e88862c99b65d87869e01d (diff)
intel/decoders: limit number of decoded batchbuffers
IGT has a test to hang the GPU that works by having a batch buffer jump back into itself, trigger an infinite loop on the command stream. As our implementation of the decoding is "perfectly" mimicking the hardware, our decoder also "hangs". This change limits the number of batch buffer we'll decode before we bail to 100. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
Diffstat (limited to 'src/intel/common')
-rw-r--r--src/intel/common/gen_batch_decoder.c15
-rw-r--r--src/intel/common/gen_decoder.h2
2 files changed, 15 insertions, 2 deletions
diff --git a/src/intel/common/gen_batch_decoder.c b/src/intel/common/gen_batch_decoder.c
index becb708da65..ff898d8222c 100644
--- a/src/intel/common/gen_batch_decoder.c
+++ b/src/intel/common/gen_batch_decoder.c
@@ -810,6 +810,17 @@ gen_print_batch(struct gen_batch_decode_ctx *ctx,
const uint32_t *p, *end = batch + batch_size / sizeof(uint32_t);
int length;
struct gen_group *inst;
+ const char *reset_color = ctx->flags & GEN_BATCH_DECODE_IN_COLOR ? NORMAL : "";
+
+ if (ctx->n_batch_buffer_start >= 100) {
+ fprintf(ctx->fp, "%s0x%08"PRIx64": Max batch buffer jumps exceeded%s\n",
+ (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) ? RED_COLOR : "",
+ (ctx->flags & GEN_BATCH_DECODE_OFFSETS) ? batch_addr : 0,
+ reset_color);
+ return;
+ }
+
+ ctx->n_batch_buffer_start++;
for (p = batch; p < end; p += length) {
inst = gen_ctx_find_instruction(ctx, p);
@@ -817,8 +828,6 @@ gen_print_batch(struct gen_batch_decode_ctx *ctx,
assert(inst == NULL || length > 0);
length = MAX2(1, length);
- const char *reset_color = ctx->flags & GEN_BATCH_DECODE_IN_COLOR ? NORMAL : "";
-
uint64_t offset;
if (ctx->flags & GEN_BATCH_DECODE_OFFSETS)
offset = batch_addr + ((char *)p - (char *)batch);
@@ -908,4 +917,6 @@ gen_print_batch(struct gen_batch_decode_ctx *ctx,
break;
}
}
+
+ ctx->n_batch_buffer_start--;
}
diff --git a/src/intel/common/gen_decoder.h b/src/intel/common/gen_decoder.h
index f5f38078442..b4c85ab0c1d 100644
--- a/src/intel/common/gen_decoder.h
+++ b/src/intel/common/gen_decoder.h
@@ -237,6 +237,8 @@ struct gen_batch_decode_ctx {
int max_vbo_decoded_lines;
enum drm_i915_gem_engine_class engine;
+
+ int n_batch_buffer_start;
};
void gen_batch_decode_ctx_init(struct gen_batch_decode_ctx *ctx,