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authorAnuj Phogat <[email protected]>2017-06-07 15:47:24 -0700
committerAnuj Phogat <[email protected]>2017-06-20 12:18:26 -0700
commit8521559e086a3d56f549962ab8e9f45a6a5989d8 (patch)
tree21ca880b64d614907dcd98fab825ca38cdf0a58c /src/intel/common/gen_l3_config.c
parent4eb37475442876a1dd85a102a1c8d3458b563221 (diff)
i965: Fix broxton 2x6 l3 config
The new table added in this patch matches with the table in gfxspecs. We were programming the wrong values earlier. V2: Update the comment. Cc: "17.1" <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/intel/common/gen_l3_config.c')
-rw-r--r--src/intel/common/gen_l3_config.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c
index ae31d08bdf3..150ec261a5f 100644
--- a/src/intel/common/gen_l3_config.c
+++ b/src/intel/common/gen_l3_config.c
@@ -102,6 +102,20 @@ static const struct gen_l3_config chv_l3_configs[] = {
};
/**
+ * BXT 2x6 validated L3 configurations. \sa ivb_l3_configs.
+ */
+static const struct gen_l3_config bxt_2x6_l3_configs[] = {
+ /* SLM URB ALL DC RO IS C T */
+ {{ 0, 32, 48, 0, 0, 0, 0, 0 }},
+ {{ 0, 32, 0, 8, 40, 0, 0, 0 }},
+ {{ 0, 32, 0, 32, 16, 0, 0, 0 }},
+ {{ 16, 16, 48, 0, 0, 0, 0, 0 }},
+ {{ 16, 16, 0, 40, 8, 0, 0, 0 }},
+ {{ 16, 16, 0, 16, 32, 0, 0, 0 }},
+ {{ 0 }}
+};
+
+/**
* Return a zero-terminated array of validated L3 configurations for the
* specified device.
*/
@@ -117,6 +131,8 @@ get_l3_configs(const struct gen_device_info *devinfo)
case 9:
case 10:
+ if (devinfo->l3_banks == 1)
+ return bxt_2x6_l3_configs;
return chv_l3_configs;
default: