summaryrefslogtreecommitdiffstats
path: root/src/intel/blorp
diff options
context:
space:
mode:
authorJason Ekstrand <[email protected]>2020-03-03 22:20:26 -0600
committerMarge Bot <[email protected]>2020-03-12 17:51:28 +0000
commitff1f0a720d8edcfc09aa41c720ba8de3afe88d72 (patch)
tree844ef4ab301854c736d85d16d87e56695de21598 /src/intel/blorp
parente13ed0e9e548c99e484e9533b0030ce555465fd7 (diff)
iris: Use ISL_AUX_USAGE_HIZ_CCS_WT to indicate write-through HiZ
Previously, we always set the aux_usage to ISL_AUX_USAGE_HIZ_CCS and let ISL choose write-through based on isl_surf_supports_hiz_ccs_wt. This commit makes us choose explicitly at surface creation time whether to use HIZ_CCS or HIZ_CCS_WT based on the same set of conditions. This is more explicit and should be more robust as it lets us choose WT mode in one place rather than trusting isl_surf_supports_hiz_ccs_wt to return the same thing every time. Reviewed-by: Nanley Chery <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
Diffstat (limited to 'src/intel/blorp')
-rw-r--r--src/intel/blorp/blorp_clear.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index b8a68ffdbec..27299d56869 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -805,7 +805,7 @@ blorp_can_hiz_clear_depth(const struct gen_device_info *devinfo,
if (x0 % align_px_w || y0 % align_px_h ||
x1 % align_px_w || y1 % align_px_h)
return false;
- } else if (isl_surf_supports_hiz_ccs_wt(devinfo, surf, aux_usage)) {
+ } else if (aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT) {
/* We have to set the WM_HZ_OP::FullSurfaceDepthandStencilClear bit
* whenever we clear an uninitialized HIZ buffer (as some drivers
* currently do). However, this bit seems liable to clear 16x8 pixels in