diff options
author | Nanley Chery <[email protected]> | 2019-10-07 15:48:33 -0700 |
---|---|---|
committer | Nanley Chery <[email protected]> | 2019-10-28 10:47:06 -0700 |
commit | 6451008e8b6013351e3e7e26f6827a218a76fcb3 (patch) | |
tree | aa3aa21c0cf4fa5307e2155e0cdc34a3b6673f51 /src/intel/blorp | |
parent | cc99d0adc0d40ba5879b0a1a1ec0b71df59fbe96 (diff) |
intel: Refactor blorp_can_hiz_clear_depth()
Prepare this function to be used in iris and to handle new Gen12 behavior.
Reviewed-by: Sagar Ghuge <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/blorp')
-rw-r--r-- | src/intel/blorp/blorp.h | 9 | ||||
-rw-r--r-- | src/intel/blorp/blorp_clear.c | 15 |
2 files changed, 14 insertions, 10 deletions
diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h index df48e91cecc..ead261b6230 100644 --- a/src/intel/blorp/blorp.h +++ b/src/intel/blorp/blorp.h @@ -188,10 +188,11 @@ blorp_clear_depth_stencil(struct blorp_batch *batch, bool clear_depth, float depth_value, uint8_t stencil_mask, uint8_t stencil_value); bool -blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format format, - uint32_t num_samples, - uint32_t x0, uint32_t y0, - uint32_t x1, uint32_t y1); +blorp_can_hiz_clear_depth(const struct gen_device_info *devinfo, + const struct isl_surf *surf, + enum isl_aux_usage aux_usage, + uint32_t level, uint32_t layer, + uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1); void blorp_hiz_clear_depth_stencil(struct blorp_batch *batch, const struct blorp_surf *depth, diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c index 7f5ae8ae358..6034bdac413 100644 --- a/src/intel/blorp/blorp_clear.c +++ b/src/intel/blorp/blorp_clear.c @@ -754,14 +754,16 @@ blorp_clear_depth_stencil(struct blorp_batch *batch, } bool -blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format format, - uint32_t num_samples, +blorp_can_hiz_clear_depth(const struct gen_device_info *devinfo, + const struct isl_surf *surf, + enum isl_aux_usage aux_usage, + uint32_t level, uint32_t layer, uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1) { /* This function currently doesn't support any gen prior to gen8 */ - assert(gen >= 8); + assert(devinfo->gen >= 8); - if (gen == 8 && format == ISL_FORMAT_R16_UNORM) { + if (devinfo->gen == 8 && surf->format == ISL_FORMAT_R16_UNORM) { /* Apply the D16 alignment restrictions. On BDW, HiZ has an 8x4 sample * block with the following property: as the number of samples increases, * the number of pixels representable by this block decreases by a factor @@ -780,7 +782,7 @@ blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format format, * Table: Pixel Dimensions in a HiZ Sample Block Pre-SKL */ const struct isl_extent2d sa_block_dim = - isl_get_interleaved_msaa_px_size_sa(num_samples); + isl_get_interleaved_msaa_px_size_sa(surf->samples); const uint8_t align_px_w = 8 / sa_block_dim.w; const uint8_t align_px_h = 4 / sa_block_dim.h; @@ -801,7 +803,8 @@ blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format format, x1 % align_px_w || y1 % align_px_h) return false; } - return true; + + return isl_aux_usage_has_hiz(aux_usage); } void |