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authorMatt Turner <[email protected]>2015-12-30 14:48:22 -0500
committerMatt Turner <[email protected]>2016-01-13 11:22:11 -0800
commita5fcff6628c641d01954d0af4aee0e723a570cad (patch)
tree27fedf5616021c31b2f1aa4b130892cbf513af1e /src/glsl/nir
parent966a0dd72066cc98e0df9a02028ee0d85d466e26 (diff)
glsl: Fix undefined shifts.
Shifting into the sign bit is undefined, as is shifting by 32. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
Diffstat (limited to 'src/glsl/nir')
-rw-r--r--src/glsl/nir/nir_opcodes.py6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/glsl/nir/nir_opcodes.py b/src/glsl/nir/nir_opcodes.py
index 855095f1f35..d7ba0b62375 100644
--- a/src/glsl/nir/nir_opcodes.py
+++ b/src/glsl/nir/nir_opcodes.py
@@ -516,7 +516,7 @@ int bits = src0, offset = src1;
if (offset < 0 || bits < 0 || offset + bits > 32)
dst = 0; /* undefined per the spec */
else
- dst = ((1 << bits)- 1) << offset;
+ dst = ((1ull << bits) - 1) << offset;
""")
opcode("ldexp", 0, tfloat, [0, 0], [tfloat, tint], "", """
@@ -578,7 +578,7 @@ if (bits == 0) {
} else if (bits < 0 || offset < 0 || offset + bits > 32) {
dst = 0; /* undefined per the spec */
} else {
- dst = (base >> offset) & ((1 << bits) - 1);
+ dst = (base >> offset) & ((1ull << bits) - 1);
}
""")
opcode("ibitfield_extract", 0, tint,
@@ -618,7 +618,7 @@ if (bits == 0) {
} else if (offset < 0 || bits < 0 || bits + offset > 32) {
dst = 0;
} else {
- unsigned mask = ((1 << bits) - 1) << offset;
+ unsigned mask = ((1ull << bits) - 1) << offset;
dst = (base & ~mask) | ((insert << bits) & mask);
}
""")