summaryrefslogtreecommitdiffstats
path: root/src/glsl/lower_instructions.cpp
diff options
context:
space:
mode:
authorKenneth Graunke <[email protected]>2016-01-07 15:54:16 -0800
committerMatt Turner <[email protected]>2016-01-13 10:35:12 -0800
commitb85a229e1f542426b1c8000569d89cd4768b9339 (patch)
treea770a5444309a93cc7e574f95935e7a5a62016c9 /src/glsl/lower_instructions.cpp
parent92f177386954caced2e7ddca156917cf166f9c23 (diff)
glsl: Delete the ir_binop_bfm and ir_triop_bfi opcodes.
TGSI doesn't use these - it just translates ir_quadop_bitfield_insert directly. NIR can handle ir_quadop_bitfield_insert as well. These opcodes were only used for i965, and with Jason's recent patches, we can do this lowering in NIR (which also gains us SPIR-V handling). So there's not much point to retaining this GLSL IR lowering code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/glsl/lower_instructions.cpp')
-rw-r--r--src/glsl/lower_instructions.cpp47
1 files changed, 0 insertions, 47 deletions
diff --git a/src/glsl/lower_instructions.cpp b/src/glsl/lower_instructions.cpp
index 845cfff3648..f70db873fd7 100644
--- a/src/glsl/lower_instructions.cpp
+++ b/src/glsl/lower_instructions.cpp
@@ -39,7 +39,6 @@
* - MOD_TO_FLOOR
* - LDEXP_TO_ARITH
* - DFREXP_TO_ARITH
- * - BITFIELD_INSERT_TO_BFM_BFI
* - CARRY_TO_ARITH
* - BORROW_TO_ARITH
* - SAT_TO_CLAMP
@@ -99,14 +98,6 @@
* Converts ir_binop_ldexp, ir_unop_frexp_sig, and ir_unop_frexp_exp to
* arithmetic and bit ops for double arguments.
*
- * BITFIELD_INSERT_TO_BFM_BFI:
- * ---------------------------
- * Breaks ir_quadop_bitfield_insert into ir_binop_bfm (bitfield mask) and
- * ir_triop_bfi (bitfield insert).
- *
- * Many GPUs implement the bitfieldInsert() built-in from ARB_gpu_shader_5
- * with a pair of instructions.
- *
* CARRY_TO_ARITH:
* ---------------
* Converts ir_carry into (x + y) < x.
@@ -154,7 +145,6 @@ private:
void exp_to_exp2(ir_expression *);
void pow_to_exp2(ir_expression *);
void log_to_log2(ir_expression *);
- void bitfield_insert_to_bfm_bfi(ir_expression *);
void ldexp_to_arith(ir_expression *);
void dldexp_to_arith(ir_expression *);
void dfrexp_sig_to_arith(ir_expression *);
@@ -348,29 +338,6 @@ lower_instructions_visitor::mod_to_floor(ir_expression *ir)
}
void
-lower_instructions_visitor::bitfield_insert_to_bfm_bfi(ir_expression *ir)
-{
- /* Translates
- * ir_quadop_bitfield_insert base insert offset bits
- * into
- * ir_triop_bfi (ir_binop_bfm bits offset) insert base
- */
-
- ir_rvalue *base_expr = ir->operands[0];
-
- ir->operation = ir_triop_bfi;
- ir->operands[0] = new(ir) ir_expression(ir_binop_bfm,
- ir->type->get_base_type(),
- ir->operands[3],
- ir->operands[2]);
- /* ir->operands[1] is still the value to insert. */
- ir->operands[2] = base_expr;
- ir->operands[3] = NULL;
-
- this->progress = true;
-}
-
-void
lower_instructions_visitor::ldexp_to_arith(ir_expression *ir)
{
/* Translates
@@ -482,12 +449,6 @@ lower_instructions_visitor::ldexp_to_arith(ir_expression *ir)
exp_shift_clone, exp_width);
ir->operands[1] = NULL;
- /* Don't generate new IR that would need to be lowered in an additional
- * pass.
- */
- if (lowering(BITFIELD_INSERT_TO_BFM_BFI))
- bitfield_insert_to_bfm_bfi(ir->operands[0]->as_expression());
-
this->progress = true;
}
@@ -602,9 +563,6 @@ lower_instructions_visitor::dldexp_to_arith(ir_expression *ir)
exp_shift->clone(ir, NULL),
exp_width->clone(ir, NULL));
- if (lowering(BITFIELD_INSERT_TO_BFM_BFI))
- bitfield_insert_to_bfm_bfi(bfi);
-
i.insert_before(assign(unpacked, bfi, WRITEMASK_Y));
results[elem] = expr(ir_unop_pack_double_2x32, unpacked);
@@ -1039,11 +997,6 @@ lower_instructions_visitor::visit_leave(ir_expression *ir)
pow_to_exp2(ir);
break;
- case ir_quadop_bitfield_insert:
- if (lowering(BITFIELD_INSERT_TO_BFM_BFI))
- bitfield_insert_to_bfm_bfi(ir);
- break;
-
case ir_binop_ldexp:
if (lowering(LDEXP_TO_ARITH) && ir->type->is_float())
ldexp_to_arith(ir);