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authorKenneth Graunke <[email protected]>2016-01-07 15:54:16 -0800
committerMatt Turner <[email protected]>2016-01-13 10:35:12 -0800
commitb85a229e1f542426b1c8000569d89cd4768b9339 (patch)
treea770a5444309a93cc7e574f95935e7a5a62016c9 /src/glsl/ir.h
parent92f177386954caced2e7ddca156917cf166f9c23 (diff)
glsl: Delete the ir_binop_bfm and ir_triop_bfi opcodes.
TGSI doesn't use these - it just translates ir_quadop_bitfield_insert directly. NIR can handle ir_quadop_bitfield_insert as well. These opcodes were only used for i965, and with Jason's recent patches, we can do this lowering in NIR (which also gains us SPIR-V handling). So there's not much point to retaining this GLSL IR lowering code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/glsl/ir.h')
-rw-r--r--src/glsl/ir.h22
1 files changed, 1 insertions, 21 deletions
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index 93e07343559..a2eb508e9ea 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -1551,15 +1551,6 @@ enum ir_expression_operation {
/*@}*/
/**
- * \name First half of a lowered bitfieldInsert() operation.
- *
- * \see lower_instructions::bitfield_insert_to_bfm_bfi
- */
- /*@{*/
- ir_binop_bfm,
- /*@}*/
-
- /**
* Load a value the size of a given GLSL type from a uniform block.
*
* operand0 is the ir_constant uniform block index in the linked shader.
@@ -1624,15 +1615,6 @@ enum ir_expression_operation {
ir_triop_csel,
/*@}*/
- /**
- * \name Second half of a lowered bitfieldInsert() operation.
- *
- * \see lower_instructions::bitfield_insert_to_bfm_bfi
- */
- /*@{*/
- ir_triop_bfi,
- /*@}*/
-
ir_triop_bitfield_extract,
/**
@@ -1729,9 +1711,7 @@ public:
operation == ir_quadop_vector ||
/* TODO: these can't currently be vectorized */
operation == ir_quadop_bitfield_insert ||
- operation == ir_triop_bitfield_extract ||
- operation == ir_triop_bfi ||
- operation == ir_binop_bfm;
+ operation == ir_triop_bitfield_extract;
}
/**