diff options
author | Matt Turner <[email protected]> | 2013-04-09 22:43:05 -0700 |
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committer | Matt Turner <[email protected]> | 2013-05-06 10:17:13 -0700 |
commit | dafd050883660a42b2902388826cfecbfc9b8b83 (patch) | |
tree | ea6bba7a3f32ffab590953297a141c97148d1365 /src/glsl/ir.h | |
parent | 9c04b8c28c3a8b60e896492fd1bccc923916c1c4 (diff) |
glsl: Add a pass to lower bitfield-insert into bfm+bfi.
i965/Gen7+ and Radeon/Evergreen+ have bfm/bfi instructions to implement
bitfieldInsert() from ARB_gpu_shader5.
v2: Add ir_binop_bfm and ir_triop_bfi to st_glsl_to_tgsi.cpp.
Remove spurious temporary assignment and dereference.
Reviewed-by: Chris Forbes <[email protected]>
Diffstat (limited to 'src/glsl/ir.h')
-rw-r--r-- | src/glsl/ir.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/glsl/ir.h b/src/glsl/ir.h index 470c08ca00d..6783ecaf2e9 100644 --- a/src/glsl/ir.h +++ b/src/glsl/ir.h @@ -1119,6 +1119,15 @@ enum ir_expression_operation { /*@}*/ /** + * \name First half of a lowered bitfieldInsert() operation. + * + * \see lower_instructions::bitfield_insert_to_bfm_bfi + */ + /*@{*/ + ir_binop_bfm, + /*@}*/ + + /** * Load a value the size of a given GLSL type from a uniform block. * * operand0 is the ir_constant uniform block index in the linked shader. @@ -1133,6 +1142,15 @@ enum ir_expression_operation { ir_triop_lrp, + /** + * \name Second half of a lowered bitfieldInsert() operation. + * + * \see lower_instructions::bitfield_insert_to_bfm_bfi + */ + /*@{*/ + ir_triop_bfi, + /*@}*/ + ir_triop_bitfield_extract, /** |