diff options
| author | Kenneth Graunke <[email protected]> | 2016-01-07 15:54:16 -0800 |
|---|---|---|
| committer | Matt Turner <[email protected]> | 2016-01-13 10:35:12 -0800 |
| commit | b85a229e1f542426b1c8000569d89cd4768b9339 (patch) | |
| tree | a770a5444309a93cc7e574f95935e7a5a62016c9 /src/glsl/ir.cpp | |
| parent | 92f177386954caced2e7ddca156917cf166f9c23 (diff) | |
glsl: Delete the ir_binop_bfm and ir_triop_bfi opcodes.
TGSI doesn't use these - it just translates ir_quadop_bitfield_insert
directly. NIR can handle ir_quadop_bitfield_insert as well.
These opcodes were only used for i965, and with Jason's recent patches,
we can do this lowering in NIR (which also gains us SPIR-V handling).
So there's not much point to retaining this GLSL IR lowering code.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/glsl/ir.cpp')
| -rw-r--r-- | src/glsl/ir.cpp | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp index d82bccd5d2f..b424edd8e96 100644 --- a/src/glsl/ir.cpp +++ b/src/glsl/ir.cpp @@ -431,7 +431,6 @@ ir_expression::ir_expression(int op, ir_rvalue *op0, ir_rvalue *op1) case ir_binop_borrow: case ir_binop_lshift: case ir_binop_rshift: - case ir_binop_bfm: case ir_binop_ldexp: case ir_binop_interpolate_at_offset: case ir_binop_interpolate_at_sample: @@ -468,7 +467,6 @@ ir_expression::ir_expression(int op, ir_rvalue *op0, ir_rvalue *op1, this->type = op0->type; break; - case ir_triop_bfi: case ir_triop_csel: this->type = op1->type; break; @@ -602,7 +600,6 @@ static const char *const operator_strs[] = { "max", "pow", "packHalf2x16_split", - "bfm", "ubo_load", "ldexp", "vector_extract", @@ -611,7 +608,6 @@ static const char *const operator_strs[] = { "fma", "lrp", "csel", - "bfi", "bitfield_extract", "vector_insert", "bitfield_insert", |