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author | Kenneth Graunke <[email protected]> | 2014-06-28 17:26:13 -0700 |
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committer | Kenneth Graunke <[email protected]> | 2014-06-30 14:05:27 -0700 |
commit | 6928959d8eba05b8a7d62d8829472ddc298bc8d1 (patch) | |
tree | cd77f225f58e9e0e7f76d5f70082be300dc6c942 /src/glsl/glsl_parser.yy | |
parent | 6497890bf426699c5a03b22eadc509808f31373f (diff) |
i965/disasm: Improve disassembly of jump targets on Gen6+.
Previously, flow control instructions generated output like:
(+f0) if(8) 12 8 null 0x000c0008UD { align16 WE_normal 1Q };
which included a dissasembly of the register fields, even though those
are meaningless for flow control instructions---those bits are reused
for another purpose.
It also wasn't immediately obvious which number was UIP and which was
JIP.
With this patch, we instead output:
(+f0) if(8) JIP: 8 UIP: 12 { align16 WE_normal 1Q };
which is much clearer.
The patch also introduces has_uip/has_jip helper functions which clear
up a some generation/opcode checking mess.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Reviewed-by: Kristian Høgsberg <[email protected]>
Diffstat (limited to 'src/glsl/glsl_parser.yy')
0 files changed, 0 insertions, 0 deletions