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authorRob Clark <[email protected]>2013-12-23 09:59:42 -0500
committerRob Clark <[email protected]>2013-12-26 12:13:42 -0500
commit8ab47b435319c05521bdfced6da6ce72850a2dd7 (patch)
tree41ad842a87397da59e7e7dbb756a2e75d57e8ee9 /src/glsl/glsl_lexer.ll
parentbe01d7a905d827c3c0c222cab2430c6d4575429a (diff)
freedreno/a3xx: fix blend state corruption issue
Using RMW on banked context registers is not safe. The value read could be the wrong one. So if there has been a DRAW_IDX launched, the RMW must be preceded by a WAIT_FOR_IDLE to ensure the read part of RMW sees the correct value. To avoid unnecessary WFI's, keep track if there is a need for WFI, and only emit one if needed. Furthermore, keep track if we even need to update the register in the first place. And to cut down on the amount of RMW to avoid excessive WFI's, at the tiling/GMEM level we can always overwrite RB_RENDER_CONTROL, as the state at beginning of draw/clear cmds (which we IB to) is always undefined. In the draw/clear commands, we always still use RMW (with WFI if needed), but only if the register value actually changes. (At points where the current value cannot be known, the saved value is reset to ~0, which includes bits outside of RBRC_DRAW_STATE, so there never is chance for confusion.) Signed-off-by: Rob Clark <[email protected]>
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