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authorMarek Olšák <[email protected]>2014-12-29 14:45:49 +0100
committerMarek Olšák <[email protected]>2015-01-07 12:06:43 +0100
commitedf18da85dd3b1865c4faaba650a8fa371b7103c (patch)
tree5cf04bf87559911e77dd5c57093bb2d64503e390 /src/gbm/main
parent73c2b0d18c51459697d8ec194ecfc4438c98c139 (diff)
radeonsi: only flush the right set of caches for CP DMA operations
That's either framebuffer caches or caches for shader resources. The motivation is that framebuffer caches need to be flushed very rarely here. Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gbm/main')
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