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authorRob Clark <[email protected]>2016-11-23 12:21:38 -0500
committerRob Clark <[email protected]>2016-11-30 12:25:48 -0500
commit728e2c4d38b2c03ad1fdc997bef70e646ada9fe4 (patch)
treea70a1dcba9644c3c8582cd696d4d6a274dd220a6 /src/gbm/backends/dri
parent7a591572876afdd4d3e38416f3148cfe99ea5bbf (diff)
freedreno/ir3: don't offset inloc by 8
On a3xx/a4xx, the SP_VS_VPC_DST_REG.OUTLOCn is offset by 8, so we used to add this offset into fs->inputs[n].inloc. But a5xx drops this extra offset-by-8. So instead make inloc zero based and add the offset when we emit OUTLOCn values (for the gen's that need the offset). Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gbm/backends/dri')
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