aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium
diff options
context:
space:
mode:
authorLucas Stach <[email protected]>2017-05-18 15:39:58 +0200
committerLucas Stach <[email protected]>2017-06-01 15:20:38 +0200
commitcab5996c2637c31a78a0196e42ec6de9eb61f270 (patch)
treeac06031a4c928f9c759eb992832dfcb4fab44ff1 /src/gallium
parent72011f7a7bb3e9e45a067506555930792bf27889 (diff)
etnaviv: always do cpu_fini in transfer_unmap
The cpu_fini() call pushes the buffer back into the GPU domain, which needs to be done for all buffers, not just the ones with CPU written content. The etnaviv kernel driver currently doesn't validate this, but may start to do so at a later point in time. If there is a temporary resource the fini needs to happen before the RS uses this one as the source for the upload. Also remove an invalid comment about flushing CPU caches, cpu_fini takes care of everything involved in this. Fixes: c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs") Cc: [email protected] Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Reviewed-By: Wladimir J. van der Laan <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/etnaviv/etnaviv_transfer.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/gallium/drivers/etnaviv/etnaviv_transfer.c b/src/gallium/drivers/etnaviv/etnaviv_transfer.c
index 1a5aa7fc043..4809b04ff95 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_transfer.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_transfer.c
@@ -70,6 +70,9 @@ etna_transfer_unmap(struct pipe_context *pctx, struct pipe_transfer *ptrans)
if (rsc->texture && !etna_resource_newer(rsc, etna_resource(rsc->texture)))
rsc = etna_resource(rsc->texture); /* switch to using the texture resource */
+ if (trans->rsc)
+ etna_bo_cpu_fini(etna_resource(trans->rsc)->bo);
+
if (ptrans->usage & PIPE_TRANSFER_WRITE) {
if (trans->rsc) {
/* We have a temporary resource due to either tile status or
@@ -105,15 +108,15 @@ etna_transfer_unmap(struct pipe_context *pctx, struct pipe_transfer *ptrans)
}
rsc->seqno++;
- etna_bo_cpu_fini(rsc->bo);
if (rsc->base.bind & PIPE_BIND_SAMPLER_VIEW) {
- /* XXX do we need to flush the CPU cache too or start a write barrier
- * to make sure the GPU sees it? */
ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES;
}
}
+ if (!trans->rsc)
+ etna_bo_cpu_fini(rsc->bo);
+
pipe_resource_reference(&trans->rsc, NULL);
pipe_resource_reference(&ptrans->resource, NULL);
slab_free(&ctx->transfer_pool, trans);