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authorVasily Khoruzhick <[email protected]>2019-08-18 22:48:22 -0700
committerVasily Khoruzhick <[email protected]>2019-08-23 18:19:47 -0700
commitbf2872eeb2d60d9eb0466728beb64cfee507654e (patch)
tree9f62640b9a8696d70fa9f5d7c4c2aa219b68f88f /src/gallium
parentfd129817f0ba6a58d8f190628b69c59f716191ef (diff)
lima/ppir: set write mask for texture loads if dest is reg
Destination for texture load can be a reg, so we need to set write mask in this case Tested-by: Andreas Baierl <[email protected]> Reviewed-by: Qiang Yu <[email protected]> Reviewed-by: Erico Nunes <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/lima/ir/pp/nir.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/gallium/drivers/lima/ir/pp/nir.c b/src/gallium/drivers/lima/ir/pp/nir.c
index 45d8c9b2819..d1a8bc140b6 100644
--- a/src/gallium/drivers/lima/ir/pp/nir.c
+++ b/src/gallium/drivers/lima/ir/pp/nir.c
@@ -395,7 +395,11 @@ static ppir_node *ppir_emit_tex(ppir_block *block, nir_instr *ni)
return NULL;
}
- node = ppir_node_create_dest(block, ppir_op_load_texture, &instr->dest, 0);
+ unsigned mask = 0;
+ if (!instr->dest.is_ssa)
+ mask = u_bit_consecutive(0, nir_tex_instr_dest_size(instr));
+
+ node = ppir_node_create_dest(block, ppir_op_load_texture, &instr->dest, mask);
if (!node)
return NULL;