aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium
diff options
context:
space:
mode:
authorIlia Mirkin <[email protected]>2014-07-06 23:39:38 -0400
committerIlia Mirkin <[email protected]>2015-02-20 19:30:28 -0500
commit88127874a3eacd379f3c721bbdacdbdad4d03125 (patch)
treec0a75241776c77ba8e6b0625c03cfb2ff3503f55 /src/gallium
parentb87b498b88c51fb8c80901b8f581331d3fbcd972 (diff)
nvc0/ir: no instruction can load a double immediate
Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index 817ceb862d7..7d4a859dde4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
@@ -337,6 +337,8 @@ TargetNVC0::insnCanLoad(const Instruction *i, int s,
if (sf == FILE_IMMEDIATE) {
Storage &reg = ld->getSrc(0)->asImm()->reg;
+ if (typeSizeof(i->sType) > 4)
+ return false;
if (opInfo[i->op].immdBits != 0xffffffff) {
if (i->sType == TYPE_F32) {
if (reg.data.u32 & 0xfff)