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authorChristian König <[email protected]>2010-12-14 19:32:08 +0100
committerChristian König <[email protected]>2011-01-12 00:41:49 +0100
commita1146c1373e66d429afbb92ecb08a6fd67c3e224 (patch)
tree5c3decfd38fff8795301ff3be795738fc8bf8b58 /src/gallium
parent7be5455796facbe35cf1f1bdbefa83759b2e3b58 (diff)
r600g: DP4 also supports writemasking
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/r600/r600_shader.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 268a633c518..59c080fcbba 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -1668,15 +1668,13 @@ static int tgsi_dp(struct r600_shader_ctx *ctx)
alu.src[j] = r600_src[j];
alu.src[j].chan = tgsi_chan(&inst->Src[j], i);
}
- if(inst->Dst[0].Register.WriteMask & (1 << i)) {
- r = tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
- if (r)
- return r;
- } else {
- alu.dst.sel = ctx->temp_reg;
- }
+
+ r = tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ if (r)
+ return r;
+
alu.dst.chan = i;
- alu.dst.write = 1;
+ alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1;
/* handle some special cases */
switch (ctx->inst_info->tgsi_opcode) {
case TGSI_OPCODE_DP2: