diff options
author | Ben Skeggs <[email protected]> | 2008-07-05 00:53:13 +1000 |
---|---|---|
committer | Ben Skeggs <[email protected]> | 2008-07-05 00:53:13 +1000 |
commit | 77f8167d75d0016c76812fc147c06072e5729965 (patch) | |
tree | f610929b3fa6d62013593df797b9e05d7c1452b4 /src/gallium | |
parent | 6f56b527d866506a323feb19f9d8529d40034af2 (diff) | |
parent | 194cfc7a4ed86653db34be0e331ad7c23b5334eb (diff) |
Merge remote branch 'upstream/gallium-0.1' into gallium-0.1
Diffstat (limited to 'src/gallium')
26 files changed, 510 insertions, 91 deletions
diff --git a/src/gallium/auxiliary/draw/draw_vs.c b/src/gallium/auxiliary/draw/draw_vs.c index 978954e91c9..f798b204929 100644 --- a/src/gallium/auxiliary/draw/draw_vs.c +++ b/src/gallium/auxiliary/draw/draw_vs.c @@ -160,8 +160,10 @@ draw_vs_init( struct draw_context *draw ) return FALSE; draw->vs.aos_machine = draw_vs_aos_machine(); +#ifdef PIPE_ARCH_X86 if (!draw->vs.aos_machine) return FALSE; +#endif return TRUE; } diff --git a/src/gallium/auxiliary/pipebuffer/Makefile b/src/gallium/auxiliary/pipebuffer/Makefile index 1d9b036c078..f9b39d9ce0a 100644 --- a/src/gallium/auxiliary/pipebuffer/Makefile +++ b/src/gallium/auxiliary/pipebuffer/Makefile @@ -8,6 +8,7 @@ C_SOURCES = \ pb_buffer_malloc.c \ pb_bufmgr_alt.c \ pb_bufmgr_cache.c \ + pb_bufmgr_debug.c \ pb_bufmgr_fenced.c \ pb_bufmgr_mm.c \ pb_bufmgr_pool.c \ diff --git a/src/gallium/auxiliary/pipebuffer/SConscript b/src/gallium/auxiliary/pipebuffer/SConscript index e52177bc795..56a40dda0d4 100644 --- a/src/gallium/auxiliary/pipebuffer/SConscript +++ b/src/gallium/auxiliary/pipebuffer/SConscript @@ -7,6 +7,7 @@ pipebuffer = env.ConvenienceLibrary( 'pb_buffer_malloc.c', 'pb_bufmgr_alt.c', 'pb_bufmgr_cache.c', + 'pb_bufmgr_debug.c', 'pb_bufmgr_fenced.c', 'pb_bufmgr_mm.c', 'pb_bufmgr_pool.c', diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer.h b/src/gallium/auxiliary/pipebuffer/pb_buffer.h index 857ea53c786..83ea0be74b8 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_buffer.h +++ b/src/gallium/auxiliary/pipebuffer/pb_buffer.h @@ -204,13 +204,24 @@ pb_reference(struct pb_buffer **dst, /** - * Utility function to check whether a requested alignment is consistent with - * the provided alignment or not. + * Utility function to check whether the provided alignment is consistent with + * the requested or not. */ -static INLINE int +static INLINE boolean pb_check_alignment(size_t requested, size_t provided) { - return requested <= provided && (provided % requested) == 0; + return requested <= provided && (provided % requested) == 0 ? TRUE : FALSE; +} + + +/** + * Utility function to check whether the provided alignment is consistent with + * the requested or not. + */ +static INLINE boolean +pb_check_usage(unsigned requested, unsigned provided) +{ + return (requested & provided) == provided ? TRUE : FALSE; } diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c index 7f236887a90..f599bee07e7 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c +++ b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c @@ -174,7 +174,9 @@ _fenced_buffer_finish(struct fenced_buffer *fenced_buf) struct fenced_buffer_list *fenced_list = fenced_buf->list; struct pipe_winsys *winsys = fenced_list->winsys; +#if 0 debug_warning("waiting for GPU"); +#endif assert(fenced_buf->fence); if(fenced_buf->fence) { @@ -278,11 +280,13 @@ fenced_buffer_map(struct pb_buffer *buf, _fenced_buffer_finish(fenced_buf); } +#if 0 /* Check for CPU write access (read is OK) */ if(fenced_buf->flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE) { /* this is legal -- just for debugging */ debug_warning("concurrent CPU writes"); } +#endif map = pb_map(fenced_buf->buffer, flags); if(map) { @@ -406,7 +410,7 @@ fenced_buffer_list_create(struct pipe_winsys *winsys) { struct fenced_buffer_list *fenced_list; - fenced_list = (struct fenced_buffer_list *)CALLOC(1, sizeof(*fenced_list)); + fenced_list = CALLOC_STRUCT(fenced_buffer_list); if (!fenced_list) return NULL; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr.h b/src/gallium/auxiliary/pipebuffer/pb_bufmgr.h index 00279f7010f..32867029ee7 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr.h +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr.h @@ -175,7 +175,16 @@ struct pb_manager * pb_alt_manager_create(struct pb_manager *provider1, struct pb_manager *provider2); - + +/** + * Debug buffer manager to detect buffer under- and overflows. + * + * Band size should be a multiple of the largest alignment + */ +struct pb_manager * +pb_debug_manager_create(struct pb_manager *provider, size_t band_size); + + #ifdef __cplusplus } #endif diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_alt.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_alt.c index 702bef1c043..0d2d6c0c1b2 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_alt.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_alt.c @@ -88,6 +88,9 @@ pb_alt_manager_create(struct pb_manager *provider1, { struct pb_alt_manager *mgr; + if(!provider1 || !provider2) + return NULL; + mgr = CALLOC_STRUCT(pb_alt_manager); if (!mgr) return NULL; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c index f1a457dde4d..bed4bec4fe7 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c @@ -217,7 +217,8 @@ pb_cache_is_buffer_compat(struct pb_cache_buffer *buf, if(!pb_check_alignment(desc->alignment, buf->base.base.alignment)) return FALSE; - /* XXX: check usage too? */ + if(!pb_check_usage(desc->usage, buf->base.base.usage)) + return FALSE; return TRUE; } @@ -282,7 +283,7 @@ pb_cache_manager_create_buffer(struct pb_manager *_mgr, assert(buf->buffer->base.refcount >= 1); assert(pb_check_alignment(desc->alignment, buf->buffer->base.alignment)); - assert((buf->buffer->base.usage & desc->usage) == desc->usage); + assert(pb_check_usage(desc->usage, buf->buffer->base.usage)); assert(buf->buffer->base.size >= size); buf->base.base.refcount = 1; @@ -331,7 +332,10 @@ pb_cache_manager_create(struct pb_manager *provider, { struct pb_cache_manager *mgr; - mgr = (struct pb_cache_manager *)CALLOC(1, sizeof(*mgr)); + if(!provider) + return NULL; + + mgr = CALLOC_STRUCT(pb_cache_manager); if (!mgr) return NULL; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c new file mode 100644 index 00000000000..acb9d7ad146 --- /dev/null +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c @@ -0,0 +1,297 @@ +/************************************************************************** + * + * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/** + * \file + * Debug buffer manager to detect buffer under- and overflows. + * + * \author José Fonseca <[email protected]> + */ + + +#include "pipe/p_compiler.h" +#include "pipe/p_debug.h" +#include "pipe/p_winsys.h" +#include "pipe/p_thread.h" +#include "pipe/p_util.h" +#include "util/u_double_list.h" +#include "util/u_time.h" + +#include "pb_buffer.h" +#include "pb_bufmgr.h" + + +#ifdef DEBUG + + +/** + * Convenience macro (type safe). + */ +#define SUPER(__derived) (&(__derived)->base) + + +struct pb_debug_manager; + + +/** + * Wrapper around a pipe buffer which adds delayed destruction. + */ +struct pb_debug_buffer +{ + struct pb_buffer base; + + struct pb_buffer *buffer; + struct pb_debug_manager *mgr; + + size_t underflow_size; + size_t overflow_size; +}; + + +struct pb_debug_manager +{ + struct pb_manager base; + + struct pb_manager *provider; + + size_t band_size; +}; + + +static INLINE struct pb_debug_buffer * +pb_debug_buffer(struct pb_buffer *buf) +{ + assert(buf); + return (struct pb_debug_buffer *)buf; +} + + +static INLINE struct pb_debug_manager * +pb_debug_manager(struct pb_manager *mgr) +{ + assert(mgr); + return (struct pb_debug_manager *)mgr; +} + + +static const uint8_t random_pattern[32] = { + 0xaf, 0xcf, 0xa5, 0xa2, 0xc2, 0x63, 0x15, 0x1a, + 0x7e, 0xe2, 0x7e, 0x84, 0x15, 0x49, 0xa2, 0x1e, + 0x49, 0x63, 0xf5, 0x52, 0x74, 0x66, 0x9e, 0xc4, + 0x6d, 0xcf, 0x2c, 0x4a, 0x74, 0xe6, 0xfd, 0x94 +}; + + +static INLINE void +fill_random_pattern(uint8_t *dst, size_t size) +{ + unsigned i = 0; + while(size--) { + *dst++ = random_pattern[i++]; + i &= sizeof(random_pattern) - 1; + } +} + + +static INLINE boolean +check_random_pattern(const uint8_t *dst, size_t size) +{ + unsigned i = 0; + while(size--) { + if(*dst++ != random_pattern[i++]) + return FALSE; + i &= sizeof(random_pattern) - 1; + } + return TRUE; +} + + +static void +pb_debug_buffer_destroy(struct pb_buffer *_buf) +{ + struct pb_debug_buffer *buf = pb_debug_buffer(_buf); + uint8_t *map; + + assert(!buf->base.base.refcount); + + map = pb_map(buf->buffer, PIPE_BUFFER_USAGE_CPU_READ); + assert(map); + if(map) { + if(!check_random_pattern(map, buf->underflow_size)) { + debug_printf("buffer underflow\n"); + debug_assert(0); + } + if(!check_random_pattern(map + buf->underflow_size + buf->base.base.size, + buf->overflow_size)) { + debug_printf("buffer overflow\n"); + debug_assert(0); + } + pb_unmap(buf->buffer); + } + + pb_reference(&buf->buffer, NULL); + FREE(buf); +} + + +static void * +pb_debug_buffer_map(struct pb_buffer *_buf, + unsigned flags) +{ + struct pb_debug_buffer *buf = pb_debug_buffer(_buf); + void *map = pb_map(buf->buffer, flags); + if(!map) + return NULL; + return (uint8_t *)map + buf->underflow_size; +} + + +static void +pb_debug_buffer_unmap(struct pb_buffer *_buf) +{ + struct pb_debug_buffer *buf = pb_debug_buffer(_buf); + pb_unmap(buf->buffer); +} + + +static void +pb_debug_buffer_get_base_buffer(struct pb_buffer *_buf, + struct pb_buffer **base_buf, + unsigned *offset) +{ + struct pb_debug_buffer *buf = pb_debug_buffer(_buf); + pb_get_base_buffer(buf->buffer, base_buf, offset); + *offset += buf->underflow_size; +} + + +const struct pb_vtbl +pb_debug_buffer_vtbl = { + pb_debug_buffer_destroy, + pb_debug_buffer_map, + pb_debug_buffer_unmap, + pb_debug_buffer_get_base_buffer +}; + + +static struct pb_buffer * +pb_debug_manager_create_buffer(struct pb_manager *_mgr, + size_t size, + const struct pb_desc *desc) +{ + struct pb_debug_manager *mgr = pb_debug_manager(_mgr); + struct pb_debug_buffer *buf; + struct pb_desc real_desc; + size_t real_size; + uint8_t *map; + + buf = CALLOC_STRUCT(pb_debug_buffer); + if(!buf) + return NULL; + + real_size = size + 2*mgr->band_size; + real_desc = *desc; + real_desc.usage |= PIPE_BUFFER_USAGE_CPU_WRITE; + real_desc.usage |= PIPE_BUFFER_USAGE_CPU_READ; + + buf->buffer = mgr->provider->create_buffer(mgr->provider, + real_size, + &real_desc); + if(!buf->buffer) { + FREE(buf); + return NULL; + } + + assert(buf->buffer->base.refcount >= 1); + assert(pb_check_alignment(real_desc.alignment, buf->buffer->base.alignment)); + assert(pb_check_usage(real_desc.usage, buf->buffer->base.usage)); + assert(buf->buffer->base.size >= real_size); + + buf->base.base.refcount = 1; + buf->base.base.alignment = desc->alignment; + buf->base.base.usage = desc->usage; + buf->base.base.size = size; + + buf->base.vtbl = &pb_debug_buffer_vtbl; + buf->mgr = mgr; + + buf->underflow_size = mgr->band_size; + buf->overflow_size = buf->buffer->base.size - buf->underflow_size - size; + + map = pb_map(buf->buffer, PIPE_BUFFER_USAGE_CPU_WRITE); + assert(map); + if(map) { + fill_random_pattern(map, buf->underflow_size); + fill_random_pattern(map + buf->underflow_size + size, buf->overflow_size); + pb_unmap(buf->buffer); + } + + return &buf->base; +} + + +static void +pb_debug_manager_destroy(struct pb_manager *_mgr) +{ + struct pb_debug_manager *mgr = pb_debug_manager(_mgr); + mgr->provider->destroy(mgr->provider); + FREE(mgr); +} + + +struct pb_manager * +pb_debug_manager_create(struct pb_manager *provider, size_t band_size) +{ + struct pb_debug_manager *mgr; + + if(!provider) + return NULL; + + mgr = CALLOC_STRUCT(pb_debug_manager); + if (!mgr) + return NULL; + + mgr->base.destroy = pb_debug_manager_destroy; + mgr->base.create_buffer = pb_debug_manager_create_buffer; + mgr->provider = provider; + mgr->band_size = band_size; + + return &mgr->base; +} + + +#else /* !DEBUG */ + + +struct pb_manager * +pb_debug_manager_create(struct pb_manager *provider, size_t band_size) +{ + return provider; +} + + +#endif /* !DEBUG */ diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_fenced.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_fenced.c index 9d809e2f9b5..05efd8ce41a 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_fenced.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_fenced.c @@ -117,7 +117,7 @@ fenced_bufmgr_create(struct pb_manager *provider, if(!provider) return NULL; - fenced_mgr = (struct fenced_pb_manager *)CALLOC(1, sizeof(*fenced_mgr)); + fenced_mgr = CALLOC_STRUCT(fenced_pb_manager); if (!fenced_mgr) return NULL; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c index 0a1e8c83b10..c51e582611d 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c @@ -29,7 +29,7 @@ * \file * Buffer manager using the old texture memory manager. * - * \author Jos� Fonseca <[email protected]> + * \author José Fonseca <[email protected]> */ @@ -271,8 +271,8 @@ mm_bufmgr_create(struct pb_manager *provider, struct pb_manager *mgr; struct pb_desc desc; - assert(provider); - assert(provider->create_buffer); + if(!provider) + return NULL; memset(&desc, 0, sizeof(desc)); desc.alignment = 1 << align2; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c index 528e9528f6c..95af08929a9 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c @@ -30,8 +30,8 @@ * \file * Batch buffer pool management. * - * \author Jos� Fonseca <jrfonseca-at-tungstengraphics-dot-com> - * \author Thomas Hellstr�m <thomas-at-tungstengraphics-dot-com> + * \author José Fonseca <jrfonseca-at-tungstengraphics-dot-com> + * \author Thomas Hellström <thomas-at-tungstengraphics-dot-com> */ @@ -229,7 +229,10 @@ pool_bufmgr_create(struct pb_manager *provider, struct pool_buffer *pool_buf; size_t i; - pool = (struct pool_pb_manager *)CALLOC(1, sizeof(*pool)); + if(!provider) + return NULL; + + pool = CALLOC_STRUCT(pool_pb_manager); if (!pool) return NULL; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c index b9dff09804c..598d9ce3105 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c @@ -324,8 +324,10 @@ pb_slab_manager_create_buffer(struct pb_manager *_mgr, if(!pb_check_alignment(desc->alignment, mgr->bufSize)) return NULL; - /* XXX: check for compatible buffer usage too? */ - + assert(pb_check_usage(desc->usage, mgr->desc.usage)); + if(!pb_check_usage(desc->usage, mgr->desc.usage)) + return NULL; + _glthread_LOCK_MUTEX(mgr->mutex); if (mgr->slabs.next == &mgr->slabs) { (void) pb_slab_create(mgr); @@ -438,6 +440,9 @@ pb_slab_range_manager_create(struct pb_manager *provider, size_t bufSize; unsigned i; + if(!provider) + return NULL; + mgr = CALLOC_STRUCT(pb_slab_range_manager); if (!mgr) goto out_err0; diff --git a/src/gallium/auxiliary/tgsi/exec/tgsi_exec.c b/src/gallium/auxiliary/tgsi/exec/tgsi_exec.c index 13b8c2e5bf3..46949661aff 100644 --- a/src/gallium/auxiliary/tgsi/exec/tgsi_exec.c +++ b/src/gallium/auxiliary/tgsi/exec/tgsi_exec.c @@ -214,7 +214,7 @@ tgsi_exec_machine_bind_shader( break; case TGSI_TOKEN_TYPE_INSTRUCTION: - assert( labels->count < 128 ); + assert( labels->count < MAX_LABELS ); labels->labels[labels->count][0] = instno; labels->labels[labels->count][1] = pointer; @@ -262,7 +262,7 @@ tgsi_exec_machine_init( uint i; mach->Temps = (struct tgsi_exec_vector *) tgsi_align_128bit( mach->_Temps); - mach->Addrs = &mach->Temps[TGSI_EXEC_NUM_TEMPS]; + mach->Addrs = &mach->Temps[TGSI_EXEC_TEMP_ADDR]; /* Setup constants. */ for( i = 0; i < 4; i++ ) { @@ -941,6 +941,7 @@ fetch_src_file_channel( break; case TGSI_FILE_TEMPORARY: + assert(index->i[0] < TGSI_EXEC_NUM_TEMPS); chan->u[0] = mach->Temps[index->i[0]].xyzw[swizzle].u[0]; chan->u[1] = mach->Temps[index->i[1]].xyzw[swizzle].u[1]; chan->u[2] = mach->Temps[index->i[2]].xyzw[swizzle].u[2]; @@ -1127,6 +1128,7 @@ store_dest( break; case TGSI_FILE_TEMPORARY: + assert(reg->DstRegister.Index < TGSI_EXEC_NUM_TEMPS); dst = &mach->Temps[reg->DstRegister.Index].xyzw[chan_index]; break; diff --git a/src/gallium/auxiliary/tgsi/exec/tgsi_exec.h b/src/gallium/auxiliary/tgsi/exec/tgsi_exec.h index 19bd78df3d3..18abdd9ac00 100644 --- a/src/gallium/auxiliary/tgsi/exec/tgsi_exec.h +++ b/src/gallium/auxiliary/tgsi/exec/tgsi_exec.h @@ -34,6 +34,8 @@ extern "C" { #endif +#define MAX_LABELS 1024 + #define NUM_CHANNELS 4 /* R,G,B,A */ #define QUAD_SIZE 4 /* 4 pixel/quad */ @@ -93,74 +95,76 @@ struct tgsi_sampler */ struct tgsi_exec_labels { - unsigned labels[128][2]; + unsigned labels[MAX_LABELS][2]; unsigned count; }; + +#define TGSI_EXEC_NUM_TEMPS 64 +#define TGSI_EXEC_NUM_TEMP_EXTRAS 6 +#define TGSI_EXEC_NUM_IMMEDIATES 256 + /* * Locations of various utility registers (_I = Index, _C = Channel) */ -#define TGSI_EXEC_TEMP_00000000_I 32 +#define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0) #define TGSI_EXEC_TEMP_00000000_C 0 -#define TGSI_EXEC_TEMP_7FFFFFFF_I 32 +#define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0) #define TGSI_EXEC_TEMP_7FFFFFFF_C 1 -#define TGSI_EXEC_TEMP_80000000_I 32 +#define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0) #define TGSI_EXEC_TEMP_80000000_C 2 -#define TGSI_EXEC_TEMP_FFFFFFFF_I 32 +#define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0) #define TGSI_EXEC_TEMP_FFFFFFFF_C 3 -#define TGSI_EXEC_TEMP_ONE_I 33 +#define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1) #define TGSI_EXEC_TEMP_ONE_C 0 -#define TGSI_EXEC_TEMP_TWO_I 33 +#define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1) #define TGSI_EXEC_TEMP_TWO_C 1 -#define TGSI_EXEC_TEMP_128_I 33 +#define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1) #define TGSI_EXEC_TEMP_128_C 2 -#define TGSI_EXEC_TEMP_MINUS_128_I 33 +#define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1) #define TGSI_EXEC_TEMP_MINUS_128_C 3 -#define TGSI_EXEC_TEMP_KILMASK_I 34 +#define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2) #define TGSI_EXEC_TEMP_KILMASK_C 0 -#define TGSI_EXEC_TEMP_OUTPUT_I 34 +#define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2) #define TGSI_EXEC_TEMP_OUTPUT_C 1 -#define TGSI_EXEC_TEMP_PRIMITIVE_I 34 +#define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2) #define TGSI_EXEC_TEMP_PRIMITIVE_C 2 -#define TGSI_EXEC_TEMP_THREE_I 34 +#define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2) #define TGSI_EXEC_TEMP_THREE_C 3 -#define TGSI_EXEC_TEMP_HALF_I 35 +#define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3) #define TGSI_EXEC_TEMP_HALF_C 0 -#define TGSI_EXEC_TEMP_R0 36 +#define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4) + +#define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 5) -#define TGSI_EXEC_NUM_TEMPS (32 + 5) -#define TGSI_EXEC_NUM_ADDRS 1 -#define TGSI_EXEC_NUM_IMMEDIATES 256 -#define TGSI_EXEC_MAX_COND_NESTING 10 -#define TGSI_EXEC_MAX_LOOP_NESTING 10 -#define TGSI_EXEC_MAX_CALL_NESTING 10 +#define TGSI_EXEC_MAX_COND_NESTING 20 +#define TGSI_EXEC_MAX_LOOP_NESTING 20 +#define TGSI_EXEC_MAX_CALL_NESTING 20 /** * Run-time virtual machine state for executing TGSI shader. */ struct tgsi_exec_machine { - /* - * 32 program temporaries - * 4 internal temporaries - * 1 address - * 1 temporary of padding to align to 16 bytes + /* Total = program temporaries + internal temporaries + * + 1 padding to align to 16 bytes */ - struct tgsi_exec_vector _Temps[TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_ADDRS + 1]; + struct tgsi_exec_vector _Temps[TGSI_EXEC_NUM_TEMPS + + TGSI_EXEC_NUM_TEMP_EXTRAS + 1]; /* * This will point to _Temps after aligning to 16B boundary. diff --git a/src/gallium/auxiliary/util/p_tile.c b/src/gallium/auxiliary/util/p_tile.c index ab603ff6e4d..93abef98792 100644 --- a/src/gallium/auxiliary/util/p_tile.c +++ b/src/gallium/auxiliary/util/p_tile.c @@ -298,6 +298,33 @@ a4r4g4b4_get_tile_rgba(ushort *src, } +static void +a4r4g4b4_put_tile_rgba(ushort *dst, + unsigned w, unsigned h, + const float *p, + unsigned src_stride) +{ + unsigned i, j; + + for (i = 0; i < h; i++) { + const float *pRow = p; + for (j = 0; j < w; j++, pRow += 4) { + unsigned r, g, b, a; + UNCLAMPED_FLOAT_TO_UBYTE(r, pRow[0]); + UNCLAMPED_FLOAT_TO_UBYTE(g, pRow[1]); + UNCLAMPED_FLOAT_TO_UBYTE(b, pRow[2]); + UNCLAMPED_FLOAT_TO_UBYTE(a, pRow[3]); + r >>= 4; + g >>= 4; + b >>= 4; + a >>= 4; + *dst++ = (a << 12) | (r << 16) | (g << 4) | b; + } + p += src_stride; + } +} + + /*** PIPE_FORMAT_R5G6B5_UNORM ***/ static void @@ -774,6 +801,10 @@ pipe_put_tile_rgba(struct pipe_context *pipe, r5g5b5_put_tile_rgba((ushort *) packed, w, h, p, src_stride); break; case PIPE_FORMAT_R8G8B8A8_UNORM: + assert(0); + break; + case PIPE_FORMAT_A4R4G4B4_UNORM: + a4r4g4b4_put_tile_rgba((ushort *) packed, w, h, p, src_stride); break; case PIPE_FORMAT_L8_UNORM: /*l8_put_tile_rgba((ubyte *) packed, w, h, p, src_stride);*/ diff --git a/src/gallium/auxiliary/util/u_blit.c b/src/gallium/auxiliary/util/u_blit.c index ae779335dc0..3dc9fdd11e7 100644 --- a/src/gallium/auxiliary/util/u_blit.c +++ b/src/gallium/auxiliary/util/u_blit.c @@ -308,6 +308,17 @@ util_blit_pixels(struct blit_state *ctx, } assert(screen->is_format_supported(screen, src->format, PIPE_TEXTURE)); + assert(screen->is_format_supported(screen, dst->format, PIPE_TEXTURE)); + + if(dst->format == src->format && (dstX1 - dstX0) == srcW && (dstY1 - dstY0) == srcH) { + /* FIXME: this will most surely fail for overlapping rectangles */ + pipe->surface_copy(pipe, FALSE, + dst, dstX0, dstY0, /* dest */ + src, srcX0, srcY0, /* src */ + srcW, srcH); /* size */ + return; + } + assert(screen->is_format_supported(screen, dst->format, PIPE_SURFACE)); /* diff --git a/src/gallium/drivers/softpipe/sp_setup.c b/src/gallium/drivers/softpipe/sp_setup.c index 543d86a5cb9..e99df9d0181 100644 --- a/src/gallium/drivers/softpipe/sp_setup.c +++ b/src/gallium/drivers/softpipe/sp_setup.c @@ -1266,12 +1266,14 @@ void setup_prepare( struct setup_context *setup ) sp->framebuffer.zsbuf->status = PIPE_SURFACE_STATUS_DEFINED; } + /* Note: nr_attrs is only used for debugging (vertex printing) */ { const struct sp_fragment_shader *fs = setup->softpipe->fs; - setup->quad.nr_attrs = fs->info.num_inputs; - sp->quad.first->begin(sp->quad.first); + setup->quad.nr_attrs = fs->info.num_inputs + 1; /* +1 for vert pos */ } + sp->quad.first->begin(sp->quad.first); + if (sp->reduced_api_prim == PIPE_PRIM_TRIANGLES && sp->rasterizer->fill_cw == PIPE_POLYGON_MODE_FILL && sp->rasterizer->fill_ccw == PIPE_POLYGON_MODE_FILL) { diff --git a/src/gallium/include/pipe/p_compiler.h b/src/gallium/include/pipe/p_compiler.h index d2b8c41be3d..2afb8464c73 100644 --- a/src/gallium/include/pipe/p_compiler.h +++ b/src/gallium/include/pipe/p_compiler.h @@ -107,7 +107,9 @@ typedef unsigned char boolean; /* Function inlining */ -#if defined(__GNUC__) +#ifdef __cplusplus +# define INLINE inline +#elif defined(__GNUC__) # define INLINE __inline__ #elif defined(_MSC_VER) # define INLINE __inline diff --git a/src/gallium/winsys/dri/intel/intel_swapbuffers.c b/src/gallium/winsys/dri/intel/intel_swapbuffers.c index f58da97c64a..f751f975245 100644 --- a/src/gallium/winsys/dri/intel/intel_swapbuffers.c +++ b/src/gallium/winsys/dri/intel/intel_swapbuffers.c @@ -97,7 +97,7 @@ intelDisplaySurface(__DRIdrawablePrivate *dPriv, ASSERT(surf->cpp == cpp); DBG(SWAP, "screen pitch %d src surface pitch %d\n", - pitch, surf->pitch); + pitch, surf->stride); if (cpp == 2) { BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24); diff --git a/src/gallium/winsys/egl_drm/intel/intel_context.c b/src/gallium/winsys/egl_drm/intel/intel_context.c index fdbaa230e57..7205fa4483a 100644 --- a/src/gallium/winsys/egl_drm/intel/intel_context.c +++ b/src/gallium/winsys/egl_drm/intel/intel_context.c @@ -172,6 +172,9 @@ intel_create_context(struct egl_drm_context *egl_context, const __GLcontextModes pipe->priv = intel; intel->st = st_create_context(pipe, visual, st_share); + + screen->dummy = intel; + return TRUE; } diff --git a/src/gallium/winsys/egl_drm/intel/intel_context.h b/src/gallium/winsys/egl_drm/intel/intel_context.h index ccf81207611..f05a213ff06 100644 --- a/src/gallium/winsys/egl_drm/intel/intel_context.h +++ b/src/gallium/winsys/egl_drm/intel/intel_context.h @@ -64,8 +64,7 @@ struct intel_framebuffer { struct st_framebuffer *stfb; - /* other fields TBD */ - int other; + struct intel_screen *screen; struct _DriBufferObject *front_buffer; struct egl_drm_frontbuffer *front; }; diff --git a/src/gallium/winsys/egl_drm/intel/intel_egl.c b/src/gallium/winsys/egl_drm/intel/intel_egl.c index 3b4ab330f5b..6865bfa3d4f 100644 --- a/src/gallium/winsys/egl_drm/intel/intel_egl.c +++ b/src/gallium/winsys/egl_drm/intel/intel_egl.c @@ -74,9 +74,11 @@ struct drm_screen uint32_t fbID; drmModeCrtcPtr crtc; - /* currently only support one output */ - drmModeOutputPtr output; - uint32_t outputID; + /* currently only support one connector */ + drmModeConnectorPtr connector; + drmModeEncoderPtr encoder; + uint32_t connectorID; + uint32_t encoderID; struct drm_mode_modeinfo *mode; @@ -92,26 +94,39 @@ drm_update_res(struct drm_driver *drm_drv) } static void -drm_add_modes_from_output(_EGLScreen *screen, drmModeOutputPtr output) +drm_add_modes_from_connector(_EGLScreen *screen, drmModeConnectorPtr connector) { struct drm_mode_modeinfo *m; int i; - for (i = 0; i < output->count_modes; i++) { - m = &output->modes[i]; + for (i = 0; i < connector->count_modes; i++) { + m = &connector->modes[i]; _eglAddNewMode(screen, m->hdisplay, m->vdisplay, m->vrefresh, m->name); } } +static void +print_modes(drmModeConnectorPtr connector) +{ + struct drm_mode_modeinfo *m; + int i; + + for (i = 0; i < connector->count_modes; i++) { + m = &connector->modes[i]; + printf("dfm %p %i %i %i\n", m, m->hdisplay, m->vdisplay, m->vrefresh); + } +} + static EGLBoolean drm_initialize(_EGLDriver *drv, EGLDisplay dpy, EGLint *major, EGLint *minor) { + printf("%s enter\n", __FUNCTION__); _EGLDisplay *disp = _eglLookupDisplay(dpy); struct drm_driver *drm_drv = (struct drm_driver *)drv; struct drm_screen *screen = NULL; - drmModeOutputPtr output = NULL; + drmModeConnectorPtr connector = NULL; drmModeResPtr res = NULL; - unsigned count_outputs = 0; + unsigned count_connectors = 0; EGLint i; int fd; @@ -130,40 +145,41 @@ drm_initialize(_EGLDriver *drv, EGLDisplay dpy, EGLint *major, EGLint *minor) drm_update_res(drm_drv); res = drm_drv->res; if (res) - count_outputs = res->count_outputs; + count_connectors = res->count_connectors; - for(i = 0; i < count_outputs; i++) { - output = drmModeGetOutput(fd, res->outputs[i]); + for(i = 0; i < count_connectors; i++) { + connector = drmModeGetConnector(fd, res->connectors[i]); - if (!output) + if (!connector) continue; - if (output->connection == DRM_MODE_DISCONNECTED) { - drmModeFreeOutput(output); + if (connector->connection == DRM_MODE_DISCONNECTED) { + drmModeFreeConnector(connector); continue; } screen = malloc(sizeof(struct drm_screen)); memset(screen, 0, sizeof(*screen)); - screen->outputID = res->outputs[i]; - screen->output = output; + screen->connectorID = res->connectors[i]; + screen->connector = connector; _eglInitScreen(&screen->base); _eglAddScreen(disp, &screen->base); - drm_add_modes_from_output(&screen->base, output); + drm_add_modes_from_connector(&screen->base, connector); } /* for now we only have one config */ - _EGLConfig config; - _eglInitConfig(&config, i + 1); - _eglSetConfigAttrib(&config, EGL_RED_SIZE, 8); - _eglSetConfigAttrib(&config, EGL_GREEN_SIZE, 8); - _eglSetConfigAttrib(&config, EGL_BLUE_SIZE, 8); - _eglSetConfigAttrib(&config, EGL_ALPHA_SIZE, 8); - _eglSetConfigAttrib(&config, EGL_BUFFER_SIZE, 32); - _eglSetConfigAttrib(&config, EGL_DEPTH_SIZE, 24); - _eglSetConfigAttrib(&config, EGL_STENCIL_SIZE, 8); - _eglSetConfigAttrib(&config, EGL_SURFACE_TYPE, EGL_PBUFFER_BIT); - _eglAddConfig(disp, &config); + _EGLConfig *config = calloc(1, sizeof(*config)); + memset(config, 1, sizeof(*config)); + _eglInitConfig(config, 1); + _eglSetConfigAttrib(config, EGL_RED_SIZE, 8); + _eglSetConfigAttrib(config, EGL_GREEN_SIZE, 8); + _eglSetConfigAttrib(config, EGL_BLUE_SIZE, 8); + _eglSetConfigAttrib(config, EGL_ALPHA_SIZE, 8); + _eglSetConfigAttrib(config, EGL_BUFFER_SIZE, 32); + _eglSetConfigAttrib(config, EGL_DEPTH_SIZE, 24); + _eglSetConfigAttrib(config, EGL_STENCIL_SIZE, 8); + _eglSetConfigAttrib(config, EGL_SURFACE_TYPE, EGL_PBUFFER_BIT); + _eglAddConfig(disp, config); drv->Initialized = EGL_TRUE; @@ -401,13 +417,13 @@ drm_create_screen_surface_mesa(_EGLDriver *drv, EGLDisplay dpy, EGLConfig cfg, } static struct drm_mode_modeinfo * -drm_find_mode(drmModeOutputPtr output, _EGLMode *mode) +drm_find_mode(drmModeConnectorPtr connector, _EGLMode *mode) { int i; struct drm_mode_modeinfo *m; - for (i = 0; i < output->count_modes; i++) { - m = &output->modes[i]; + for (i = 0; i < connector->count_modes; i++) { + m = &connector->modes[i]; if (m->hdisplay == mode->Width && m->vdisplay == mode->Height && m->vrefresh == mode->RefreshRate) break; m = NULL; @@ -493,7 +509,7 @@ drm_show_screen_surface_mesa(_EGLDriver *drv, EGLDisplay dpy, if (!scrn->fb) goto err_bo; - scrn->mode = drm_find_mode(scrn->output, mode); + scrn->mode = drm_find_mode(scrn->connector, mode); if (!scrn->mode) { printf("oh noes, no matching mode found\n"); goto err_fb; @@ -504,7 +520,7 @@ drm_show_screen_surface_mesa(_EGLDriver *drv, EGLDisplay dpy, drm_drv->res->crtcs[1], scrn->fbID, 0, 0, - &scrn->outputID, 1, + &scrn->connectorID, 1, scrn->mode); @@ -549,7 +565,6 @@ drm_make_current(_EGLDriver *drv, EGLDisplay dpy, EGLSurface draw, EGLSurface re struct drm_context *ctx = lookup_drm_context(context); EGLBoolean b; - printf("drm_make_current\n"); b = _eglMakeCurrent(drv, dpy, draw, read, context); if (!b) return EGL_FALSE; @@ -559,7 +574,6 @@ drm_make_current(_EGLDriver *drv, EGLDisplay dpy, EGLSurface draw, EGLSurface re (void) readSurf; (void) ctx; - printf("enter intel_make_current\n"); intel_make_current(ctx->context, drawSurf->drawable, readSurf->drawable); return EGL_TRUE; } @@ -588,6 +602,7 @@ _EGLDriver * _eglMain(_EGLDisplay *dpy, const char *args) { struct drm_driver *drm; + printf("%s enter\n", __FUNCTION__); drm = (struct drm_driver *) calloc(1, sizeof(struct drm_driver)); if (!drm) { diff --git a/src/gallium/winsys/egl_drm/intel/intel_screen.c b/src/gallium/winsys/egl_drm/intel/intel_screen.c index 96b0bf1b851..2818b9676c5 100644 --- a/src/gallium/winsys/egl_drm/intel/intel_screen.c +++ b/src/gallium/winsys/egl_drm/intel/intel_screen.c @@ -56,7 +56,7 @@ intel_init_driver(struct egl_drm_device *device) /** TODO JB: ugly hack */ intel_screen->deviceID = PCI_CHIP_I945_GM; - intel_be_init_device(&intel_screen->base, device->drmFD); + intel_be_init_device(&intel_screen->base, device->drmFD, PCI_CHIP_I945_GM); intel_screen->pipe = i915_create_screen(&intel_screen->base.base, intel_screen->deviceID); @@ -76,6 +76,8 @@ intel_create_drawable(struct egl_drm_drawable *drawable, if (!intelfb) return GL_FALSE; + intelfb->screen = drawable->device->priv; + if (visual->redBits == 5) colorFormat = PIPE_FORMAT_R5G6B5_UNORM; else diff --git a/src/gallium/winsys/egl_drm/intel/intel_screen.h b/src/gallium/winsys/egl_drm/intel/intel_screen.h index 87c4406f54d..9b990b48e77 100644 --- a/src/gallium/winsys/egl_drm/intel/intel_screen.h +++ b/src/gallium/winsys/egl_drm/intel/intel_screen.h @@ -34,6 +34,7 @@ struct pipe_screen; struct egl_drm_device; +struct intel_context; struct intel_screen { @@ -42,6 +43,8 @@ struct intel_screen int deviceID; struct egl_drm_device *device; + + struct intel_context *dummy; }; #endif diff --git a/src/gallium/winsys/egl_drm/intel/intel_swapbuffers.c b/src/gallium/winsys/egl_drm/intel/intel_swapbuffers.c index 24e55f15681..bfff6f935fd 100644 --- a/src/gallium/winsys/egl_drm/intel/intel_swapbuffers.c +++ b/src/gallium/winsys/egl_drm/intel/intel_swapbuffers.c @@ -68,18 +68,23 @@ intel_display_surface(struct egl_drm_drawable *draw, //const int srcWidth = surf->width; //const int srcHeight = surf->height; - const int srcPitch = surf->pitch; + + intel = intel_fb->screen->dummy; + if (!intel) { + printf("No dummy context\n"); + return; + } const int dstWidth = intel_fb->front->width; const int dstHeight = intel_fb->front->height; const int dstPitch = intel_fb->front->pitch / 4;//draw->front.cpp; const int cpp = 4;//intel_fb->front->cpp; + const int srcPitch = surf->stride / cpp; int BR13, CMD; //int i; - BR13 = (dstPitch * cpp) | (0xCC << 16) | (1 << 24) | (1 << 25); CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB); |