diff options
author | Christian Gmeiner <[email protected]> | 2018-03-25 22:30:04 +0200 |
---|---|---|
committer | Christian Gmeiner <[email protected]> | 2018-04-08 22:21:40 +0200 |
commit | 4020fa3e0854690cb43f17a379a508ad44f806c2 (patch) | |
tree | a601740337568f5cb714f724e34efc7b57559553 /src/gallium | |
parent | 3c3f936ae1803e3ed78beaad6f9437eb5000a32c (diff) |
etnaviv: support MC performance counters
Signed-off-by: Christian Gmeiner <[email protected]>
Tested-by: Chris Healy <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r-- | src/gallium/drivers/etnaviv/etnaviv_query_pm.c | 21 | ||||
-rw-r--r-- | src/gallium/drivers/etnaviv/etnaviv_query_pm.h | 4 |
2 files changed, 25 insertions, 0 deletions
diff --git a/src/gallium/drivers/etnaviv/etnaviv_query_pm.c b/src/gallium/drivers/etnaviv/etnaviv_query_pm.c index 88485b5640f..6d3c9e2d00c 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_query_pm.c +++ b/src/gallium/drivers/etnaviv/etnaviv_query_pm.c @@ -339,6 +339,27 @@ static const struct etna_perfmon_config query_config[] = { .source = (const struct etna_perfmon_source[]) { { "TX", "CACHE_MISS_TEXEL_COUNT" } } + }, + { + .name = "mc-total-read-req-8b-from-pipeline", + .type = ETNA_QUERY_MC_TOTAL_READ_REQ_8B_FROM_PIPELINE, + .source = (const struct etna_perfmon_source[]) { + { "MC", "TOTAL_READ_REQ_8B_FROM_PIPELINE" } + } + }, + { + .name = "mc-total-read-req-8b-from-ip", + .type = ETNA_QUERY_MC_TOTAL_READ_REQ_8B_FROM_IP, + .source = (const struct etna_perfmon_source[]) { + { "MC", "TOTAL_READ_REQ_8B_FROM_IP" } + } + }, + { + .name = "mc-total-write-req-8b-from-pipeline", + .type = ETNA_QUERY_MC_TOTAL_WRITE_REQ_8B_FROM_PIPELINE, + .source = (const struct etna_perfmon_source[]) { + { "MC", "TOTAL_WRITE_REQ_8B_FROM_PIPELINE" } + } } }; diff --git a/src/gallium/drivers/etnaviv/etnaviv_query_pm.h b/src/gallium/drivers/etnaviv/etnaviv_query_pm.h index 9cfd06e0eca..f6d27ee4065 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_query_pm.h +++ b/src/gallium/drivers/etnaviv/etnaviv_query_pm.h @@ -83,6 +83,10 @@ struct etna_screen; #define ETNA_QUERY_TX_CACHE_HIT_TEXEL_COUNT (ETNA_PM_QUERY_BASE + 41) #define ETNA_QUERY_TX_CACHE_MISS_TEXEL_COUNT (ETNA_PM_QUERY_BASE + 42) +#define ETNA_QUERY_MC_TOTAL_READ_REQ_8B_FROM_PIPELINE (ETNA_PM_QUERY_BASE + 43) +#define ETNA_QUERY_MC_TOTAL_READ_REQ_8B_FROM_IP (ETNA_PM_QUERY_BASE + 44) +#define ETNA_QUERY_MC_TOTAL_WRITE_REQ_8B_FROM_PIPELINE (ETNA_PM_QUERY_BASE + 45) + struct etna_pm_query { struct etna_query base; struct etna_perfmon_signal *signal; |